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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Estudos e avaliações de compiladores para arquiteturas reconfiguráveis / A compiler analysis for reconfigurable hardware

Lopes, Joelmir José 25 May 2007 (has links)
Com o aumento crescente das capacidades dos circuitos integrado e conseqüente complexidade das aplicações, em especial as embarcadas, um requisito tem se tornado fundamental no desenvolvimento desses sistemas: ferramentas de desenvolvimento cada vez mais acessíveis aos engenheiros, permitindo, por exemplo, que um programa escrito em linguagem C possa ser convertido diretamente em hardware. Os FPGAs (Field Programmable Gate Array), elemento fundamental na caracterização de computação reconfigurável, é um exemplo desse crescimento, tanto em capacidade do CI como disponibilidade de ferramentas. Esse projeto teve como objetivos: estudar algumas ferramentas de conversão C, C++ ou Java para hardware reconfigurável; estudar benchmarks a serem executadas nessas ferramentas para obter desempenho das mesmas, e ter o domínio dos conceitos na conversão de linguagens de alto nível para hardware reconfigurável. A plataforma utilizada no projeto foi a da empresa Xilinx XUP V2P / With the growing capacities of Integrated Circuits (IC) and the complexity of the applications, especially in embedded systems, there are now requisites for developing tools that convert algorithms C direct into the hardware. As a fundamental element to characterize Reconfigurable Computing, FPGA (Field Programmable Gate Array) is an example of those CIs, as well as the tools that have been developed. In this project we present different tools to convert C into the hardware. We also present benchmarks to be executed on those tools for performance analysis. Finally we conclude the project presenting results relating the experience to implement C direct into the hardware. The Xilinx XUP V2P platform was used in the project
2

The Pursuit of an Unequivocal Primary Representation

Brinkerhoff, Delroy A. 01 May 2010 (has links)
A chief human characteristic is the desire and ability to change the world. Prior planning is crucial when those changes are complex and extensive, and require the cooperation of many people. To satisfy this need, many disciplines have developed specialized notations for representing the plans. Developers in one discipline, computer-based instruction, are burdened by the current need to use two separate notations. Instructional experts design the instruction and represent the design with a primary representation. The instruction described in a primary representation is easy to see, which makes the representation suitable for evaluation, communication, and enhancement. Programmers translate the primary representation into a computer program, which is able to run on a computer but is a secondary representation. The problem with this process is that the primary representation is equivocal or ambiguous. Equivocal representations are subject to multiple interpretations; it is also possible for programmers to introduce errors during translation. Alternatively, the computer program is unequivocal, but the instruction that is evident in the primary representation diffuses into the program, becoming obscure and difficult to use for further evaluation, communication, or enhancement. A representation that is both unequivocal and primary benefits computer-based instructional development by eliminating ambiguity and translation errors while preserving the instructional details for later use. A representation is unequivocal if it is computable, and it is primary if it is able to represent the dynamic behaviors of complex instruction and its use as a design language can be demonstrated in published literature. My research evaluated and compared two design languages, PEAnets (networks of processes, entities, and actions) and the Unified Modeling Language, as potential unequivocal primary representations. Two translators, one for each language, were developed as a part of this research, and four complex computer-based instructional examples were created and translated into operational computer-based instruction. The translators demonstrated that both representations are computable, and the examples demonstrated that both languages are sufficiently robust to represent complex computer-based instructional systems. Both languages have been used successfully for designing instruction or general computer systems. I concluded, based on these observations, that both languages qualify as unequivocal primary representations.
3

Using domain specific languages to capture design knowledge for model-based systems engineering

Kerzhner, Aleksandr A. January 2009 (has links)
Thesis (M. S.)--Mechanical Engineering, Georgia Institute of Technology, 2009. / Committee Chair: Paredis, Chris; Committee Member: McGinnis, Leon; Committee Member: Schaefer, Dirk.
4

Estudos e avaliações de compiladores para arquiteturas reconfiguráveis / A compiler analysis for reconfigurable hardware

Joelmir José Lopes 25 May 2007 (has links)
Com o aumento crescente das capacidades dos circuitos integrado e conseqüente complexidade das aplicações, em especial as embarcadas, um requisito tem se tornado fundamental no desenvolvimento desses sistemas: ferramentas de desenvolvimento cada vez mais acessíveis aos engenheiros, permitindo, por exemplo, que um programa escrito em linguagem C possa ser convertido diretamente em hardware. Os FPGAs (Field Programmable Gate Array), elemento fundamental na caracterização de computação reconfigurável, é um exemplo desse crescimento, tanto em capacidade do CI como disponibilidade de ferramentas. Esse projeto teve como objetivos: estudar algumas ferramentas de conversão C, C++ ou Java para hardware reconfigurável; estudar benchmarks a serem executadas nessas ferramentas para obter desempenho das mesmas, e ter o domínio dos conceitos na conversão de linguagens de alto nível para hardware reconfigurável. A plataforma utilizada no projeto foi a da empresa Xilinx XUP V2P / With the growing capacities of Integrated Circuits (IC) and the complexity of the applications, especially in embedded systems, there are now requisites for developing tools that convert algorithms C direct into the hardware. As a fundamental element to characterize Reconfigurable Computing, FPGA (Field Programmable Gate Array) is an example of those CIs, as well as the tools that have been developed. In this project we present different tools to convert C into the hardware. We also present benchmarks to be executed on those tools for performance analysis. Finally we conclude the project presenting results relating the experience to implement C direct into the hardware. The Xilinx XUP V2P platform was used in the project
5

Visual modelling and designing for cooperative learning and development of team competences

Figl, Kathrin, Derntl, Michael, Kabicher, Sonja January 2009 (has links) (PDF)
This paper proposes a holistic approach to designing for the promotion of team and social competences in blended learning courses. Planning and modelling cooperative learning scenarios based on a domain specific modelling notation in the style of UML activity diagrams, and comparing evaluation results with planned outcomes allows for iterative optimization of a course's design. In a case study - a course on project management for computer science students - the instructional design including individual and cooperative learning situations was modelled. Specific emphasis was put on visualising the hypothesised development of team competences in the course design models. These models were subsequently compared to evaluation results obtained during the course. The results show that visual modelling of planned competence promotion enables more focused design, implementation and evaluation of collaborative learning scenarios.
6

Cognitive Effectiveness of Visual Instructional Design Languages

Figl, Kathrin, Derntl, Michael, Rodriguez, Manuel Caeiro, Botturi, Luca January 2010 (has links) (PDF)
The introduction of learning technologies into education is making the design of courses and instructional materials an increasingly complex task. Instructional design languages are identified as conceptual tools for achieving more standardized and, at the same time, more creative design solutions, as well as enhancing communication and transparency in the design process. In this article we discuss differences in cognitive aspects of three visual instructional design languages (E²ML, PoEML, coUML), based on user evaluation. Cognitive aspects are of relevance for learning a design language, creating models with it, and understanding models created using it. The findings should enable language constructors to improve the usability of visual instructional design languages in the future. The paper concludes with directions with regard to how future research on visual instructional design languages could strengthen their value and enhance their actual use by educators and designers by synthesizing existing efforts into a unified modeling approach for VIDLs.
7

ExtractCFG : a framework to enable accurate timing back annotation of C language source code

Goswami, Arindam 30 September 2011 (has links)
The current trend in embedded systems design is to move the initial design and exploration phase to a higher level of abstraction, in order to tackle the rapidly increasing complexity of embedded systems. One approach of abstracting software development from the low level platform details is host- compiled simulation. Characteristics of the target platform are represented in a host-compiled simulation model by annotating the high level source code. Compiler optimizations make accurate annotation of the code a challenging task. In this thesis, we describe an approach to enable correct back-annotation of C code at the basic block level, while taking compiler optimizations into account. / text

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