Remote control service on the internet has found many applications such as remote teaching service and industry applications. Our research is not like the traditional method which sends image frames to network users. Instead, we only send the mouse and keyboard message. Our research is composed of two techniques: one is to connect computer¡¦s mouse and keyboard message with virtual device driver, and the other is to provide network function and interface with Win32 application. The accomplishment of virtual device driver is achieved by VxD and Win32 API. We compare our method with other traditional methods in both local network and 56K Modem to test the possibility of remote teaching service. The transmission amount is reduced significantly by our method. Also, the remote teaching service using our method has been successfully performed at 56K modem network environment without the delay phenomenon as shown in the test by the traditional method.

Device driver is an important part of an operating system. All I/O device accesses must be done through device drivers. Because they reside in the kernel address space, a driver fault may lead to a system failure, which is not acceptable for embedded systems with high dependability requirements. Many embedded systems execute safety-critical tasks and hence a system failure will cause a great loss. Running drivers in user mode can prevent the drivers from damaging the operating system kernel. User mode driver resulted in a large performance degradation when it was proposed during the 1980s. Nonetheless, the performance has been improved due to good implementations of system call and context switch. According to the previous study, the performance of a user mode driver for a Gigabit network card can achieve 93% of that of the kernel mode driver in a Linux-based platform. Although the performance of user mode drivers has been improved, there is still a crucial problem which handicaps user mode drivers from being utilized widely. That is, drivers have to be modified in order to support a given user mode driver framework. In this thesis, we propose a user mode driver framework, which allows a kernel mode driver to be executed in the user space without any code modifications. The framework emulates the kernel-space execution environment in the user space, In this framework, communication between user mode driver process and the kernel is done through I/O request redirection and shared memory. We implemented the framework on an ARM Linux based embedded system platform. The prototype of our framework supports two classes of user mode drivers: character device drivers and network interface drivers. The former includes a LED and a 7-segment user mode device drivers, and the latter consists of an Ethernet user mode device driver. Our work has two contributions. First of all, we enable direct execution of kernel mode drivers in the user space without any driver code modifications.. Second, we evaluate the performance of user mode drivers in an embedded system. To the best of our knowledge, no results about performance of user mode drivers on embedded systems have been reported. According to the experimental results, the performance of our user mode drivers can achieve 61%~99% of that of the kernel mode ones. This demonstrates that the framework we propose can improve the reliability of system under the acceptable costs of performance.

Implementation of block device drivers in userspace of modern general-purpose operating systems, although possible, is fairly uncommon, poorly supported and usually achieves only low performance. Being able to implement high- performance drivers in userspace with ease would allow for faster iterations in storage research and would make it possible to design block devices which operate in radically different ways. In this thesis, we present Block Device in Userspace (BUSE), a Linux ker- nel module and communication protocol which makes it easy to develop userspace block-device drivers. Compared to the existing approaches, BUSE can scale on modern multicore architectures and provides at least 7x higher throughput with significantly simpler setup. Furthermore, the kernel module communicates with the userspace driver through shared memory, eliminating an extraneous memory copy. BUSE also solves the write-after-write and read- after-write consistency issues which stem from the use of multiple hardware queues in the Linux storage stack, allowing the implementation to focus on the domain of the problem. As a proof-of-concept, we implemented Block Device in S3 (BS3), a userspace block device implementation backed by Amazon S3 (or any other S3-compatible storage) on top of BUSE. BS3 can be used as a generic disk...

Detection of malicious logic on a hardware device is difficult to detect. This thesis proposes a device driver that emulates a hardware device and that device’s software driver. This device driver attacks the target system by accessing the hard disk in order to perform read and write transactions without the knowledge of the operating system or intrusion detection/prevention software. The attacks performed by the driver compromise the confidentiality, integrity, and availability of data on the target system’s disk drive. The attacks performed by the device driver have a less than one percent impact on system performance. This thesis, while tested in a Windows environment, applies to other operating systems (such as Linux/Unix, etc.) and thus has major implications for a wide range of users.

<p>Here at ISY research is performed on network processors. In order to evaluate the processors there is a need to have full control of every aspect of the transmission. This is not the case if you use a proprietary technology. Therefore the need for a well documented gigabit Ethernet network interface has emerged. </p><p>The purpose of this thesis work has been to design and implement an open source gigabit Ethernet controller in a FPGA together with a device driver for the Linux operating system Implementation has been done in Verilog for the hardware part and the software was developed in C.</p><p>We have implemented a fully functional gigabit Ethernet interface onto a Xilinx Virtex II-1500 FPGA together with a Linux device driver. The design uses approximately 7200 LUTs and 48 block RAMs including the opencores PCI bridge.</p>

Made available in DSpace on 2014-06-12T15:58:17Z (GMT). No. of bitstreams: 2 arquivo3450_1.pdf: 2428220 bytes, checksum: 164a34bb1ebc71c885503d9ef049987d (MD5) license.txt: 1748 bytes, checksum: 8a4605be74aa9ea9d79846c1fba20a33 (MD5) Previous issue date: 2010 / Conselho Nacional de Desenvolvimento Científico e Tecnológico / A criação de novas soluções para aumentar o desempenho de aplicações está crescendo de importância, pois os processamentos convencionais estão se tornando obsoletos. Diferentes abordagens têm sido estudadas e usadas, porém vários problemas foram encontrados. Um exemplo é dos processadores com vários núcleos, que, apesar de dissipar pouca potência, apresentam velocidade de transmissão baixa e pequena largura de banda. Circuitos ASICs apresentam alto desempenho, baixa dissipação de potência, mas possuem um alto custo de engenharia. Na tentativa de conseguir mais altos níveis de aceleração, plataformas que associam o uso de cluster de computadores convencionais com FPGAs têm sido estudadas. Este tipo de plataforma requer o uso de barramentos de alto desempenho para minimizar o gargalo de comunicação entre PC e FPGA, e um comunicador eficiente entre os nós do sistema. Neste trabalho, são vistas as principais características de algumas arquiteturas que utilizam cluster de PCs. Com isto, é proposta uma arquitetura que utiliza FPGA como co&#8208;processador em cada nó do sistema, utilizando a interface MPI para comunicação entre os nós e um device driver, para Linux, que permite transferência em rajada dos dados, através do barramento PCIe. Como estudo de caso, usado para a validação da arquitetura, é implementado a multiplicação de matrizes densas, esta funcionalidade é baseada no nível três da biblioteca BLAS

Here at ISY research is performed on network processors. In order to evaluate the processors there is a need to have full control of every aspect of the transmission. This is not the case if you use a proprietary technology. Therefore the need for a well documented gigabit Ethernet network interface has emerged. The purpose of this thesis work has been to design and implement an open source gigabit Ethernet controller in a FPGA together with a device driver for the Linux operating system Implementation has been done in Verilog for the hardware part and the software was developed in C. We have implemented a fully functional gigabit Ethernet interface onto a Xilinx Virtex II-1500 FPGA together with a Linux device driver. The design uses approximately 7200 LUTs and 48 block RAMs including the opencores PCI bridge.

Efficient memory access is critical for computing systems, yet the CPU's management of data transfers can create bottlenecks. To counter this, most advanced high-throughput systems utilize Direct Memory Access (DMA) controllers, where peripherals (such as network interfaces and USB devices) can access memory independently of the CPU, improving transfer speeds. However, this bypass also introduces security vulnerabilities if the DMA controller is not configured correctly, as DMA devices may be used to overwrite critical data or leak information. This thesis proposes a method to represent complex DMA driver source code as an abstract mathematical model in the formal analysis tool HOL4 (where users can define models and prove properties about them with HOL4 and checking the correctness of the proofs). This model enables the formal verification of the DMA driver source code's critical properties like memory isolation, initial configurations, and many more. Additionally, the thesis introduces a methodology to convert the verified HOL4 models into executable C source code, thus obtaining a formally verified C source code. The synthesized code is evaluated against the original driver source code by emulating the DMA operation in software and using fuzzing techniques for any compile and runtime errors. This validates the approach, demonstrating that converting a C driver source code into a HOL4 model and then back into C source code after verification yields a formally verified C source code. This thesis applies this methodology to DMA controllers for four devices namely Intel 8237a, Intel IXGBE x550 Ethernet Controller, MPC 5200 SoC, and STM32 DMAC. / Master of Science / This thesis addresses the critical issue of ensuring secure memory access in computing systems, focusing on Direct Memory Access (DMA) controllers. DMA devices can bypass the CPU to access a range of memory directly, enhancing transfer speeds but introducing security vulnerabilities like overwriting or leaking critical data if not configured correctly. This thesis proposes a method to model complex DMA driver source codes such that they can be rigorously analyzed with computer assistance. This approach is significant as it provides a structured methodology for analyzing DMA driver source code, reducing the risk of errors and vulnerabilities. The thesis also proposes a method to convert the abstract representation into executable source code, thus improving the reliability and security of DMA operations in computing systems.

In this age, the internet has becoming more and more popular recently. How to manage and organize the network effectively is a very important issue.Therefore, the technology of VPN was born. Through the VPN, we can manage and organize the local netork which spread everywhere effectively.But the tunneling technology which VPN used has a security problem. If we also change the VPN¡¦s port number, it will have a big dangerous security problem. In this paper, we will analyze some basic technology of VPN, and introduce how to modify the VPN. Let VPN have ability to pass through the firewall. This problem will make the people who managed whole network or firewall hard to control and manage it. Another, this paper will bring up the solution which can solve the security problem effectively. The key of network security problem is to use another protocol¡¦s port number. The solution in this paper will through solve this problem, so hacks can¡¦t modify the TCP port number such as HTTP Port 80 at will. Our solution is to implement a packet filter which is based on ethernet device driver.We use the RFC document which are defined by IETF to make the packet check rule. This packet filter can reject the illegal packet and make sure the network is safe.

Nominally, one can expect any user of modern technology to at least carry a handheld device of the class of an iPAQ (perhaps in the form of a cellphone). The availability of technology in the environment (home, office, public spaces) also continues to grow at an amazing pace. With advances in technology, it is feasible to remain connected and enjoy services that we care about, be it entertainment, sports, or plain work, anytime anywhere. We need a system that supports seamless migration of services from handhelds to the environment (or vice versa) and between environments. Virtualization technology is able to support such a migration by providing a common virtualized interface on both source and destination. In this dissertation, we focus on two levels of virtualization to address issues for seamless mobility. We first identify three different kinds of spaces and three axes to support mobility in these spaces. Then we present two systems that address these dimensions from different perspectives. For middleware level virtualization, we built a system called MobiGo that can capture the application states and restore the service execution with saved states at the destination platform. It provides the architectural elements for efficiently managing different states in the different spaces. Evaluation suggested that the overhead of the system is relatively small and meets user's expectation. On the other hand, for device level virtualization, Chameleon is a Xen-like system level virtualization system to support device level migration and automatic capability adaptation at a lower level. Chameleon is able to capture and restore device states and automatically accommodate the heterogeneity of devices to provide the migration of services. Device level virtualization can address some issues that cannot be addressed in middleware level virtualization. It also has less requirements than middleware level virtualization in order to be applied to existing systems. Through performance measurements, we demonstrate that Chameleon introduces minimal overhead while providing capability adaptation and device state migration for seamless mobility in ubiquitous computing environments.