Global ETD Search

1	HARDWARE COMPILER DRIVEN HEURISTIC SEARCH FOR DIGITAL IC TEST SEQUENCES. Patel, Mayank Raman. January 1985 (has links) No description available. Digital integrated circuits -- Testing.
2	Algorithms to determine the positioning of built-in self-test structures in VLSI circuits with references to an economic model Austwick, Michael Steven January 1989 (has links) No description available. 621.3192 Digital integrated circuits
3	Optimum design and error analysis of digital integrators Burt, Roger William, 1932- January 1963 (has links) No description available.
4	Selection of flip-flops for partial scan paths by use of a statistical testability measure / Jett, David B., January 1992 (has links) Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1992. / Vita. Abstract. Includes bibliographical references (leaves 60-62). Also available via the Internet.
5	Steady-state analyses variance estimation in simulations and dynamic pricing in service systems / Aktaran-Kalayci, Tüba. January 2006 (has links) Thesis (Ph. D.)--Industrial and Systems Engineering, Georgia Institute of Technology, 2007. / Dr. David M. Goldsman, Committee Co-Chair ; Dr. James R. Wilson, Committee Co-Chair ; Dr. Hayriye Ayhan, Committee Co-Chair ; Dr. Christos Alexopoulos, Committee Member ; Dr. Kwok Tsui, Committee Member.
6	INTELLIGENCE DRIVEN TEST SEQUENCE GENERATOR FOR VLSI (VECTOR, AUTOMATIC TESTING, SCAN DESIGN, FAULT SIMULATION, HEURISTIC SEARCH). MOHSSENIBEHBAHANI, ALAA. January 1984 (has links) The era of VLSI design necessitates the development of advanced Computer Aided Design tools. The main objective of this research was to introduce an intelligent automatic Sequential Circuit Test System, SCIRTSS, driven by A Hardware Programming Language, AHPL. SCIRTSS can handle the test vector generation process for VLSI circuits in an early state of the design loop, even before the generation of the final technology dependent network logic list. The driving force of the test generation process is the intelligent search program. The search program, supported by a set of heuristics and an accurate function level simulator, generates the test sequence to propagate the single fault effect to a primary output of the circuit. The test sequence generated is a concatenation of the sequences generated by the repeated searches on the state-space of the design. These sequences are verified by a parallel fault simulator. Design for testability techniques could be used to improve the test sequence generated. This system is user friendly and protable. Several circuits were tested under SCIRTSS, the results of some of them were introduced in this paper. Computer-aided design. Digital integrated circuits -- Testing.
7	Testing platform implementation and system integration for an active/passive imager system including readout circuit design Sarmiento Leon, Mayra Susana. January 2006 (has links) Thesis (Ph.D.)--University of Delaware, 2006. / Principal faculty advisor: Fouad Kiamilev, Dept. of Electrical and Computer Engineering. Includes bibliographical references.
8	A quasi-monolithic optical receiver using a standard digital CMOS technology Lee, Myunghee 05 1900 (has links) No description available. Digital integrated circuits
9	Logic synthesis for high-performance digital circuits / Liu, Tai-hung, January 1999 (has links) Thesis (Ph. D.)--University of Texas at Austin, 1999. / Vita. Includes bibliographical references (leaves 132-150). Available also in a digital version from Dissertation Abstracts.
10	Characterization of a digital phase locked loop and a stochastic time to digital converter / Geissenhainer, Erik D. January 1900 (has links) Thesis (M.S.)--Oregon State University, 2007. / Printout. Includes bibliographical references (leaves 44-45). Also available on the World Wide Web.

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