Silicon Oxide/Oxynitride (SiO2/SiON) has been the mainstream material used for gate dielectric for MOS transistors for the past 30 years. The aggressive scaling of the feature size of MOS transistor has limited the ability of SiO2/SiON to work effectively as the gate dielectric to modulate the conduction of current of MOS transistors due to excess leakage current dominated by direct quantum tunneling. Due to this constraint, alternative gate dielectric/high-k is being employed to reduce the leakage current in order to maintain the rate of scaling of MOS transistors. However, the cost involved in the implementation of these new gate dielectric materials are high due to the requirements of a change in the process flow for device fabrication. This work presents the results of a novel processing method implementing the use of rapid thermal processing (RTP) on conventional SiO2/SiON gate dielectric to reduce the gate leakage current by three to five orders of magnitude. Electrical properties of the effect were characterized on fabricated MOS capacitors using semiconductor parameter analyzer and LCR meter. Material characterization was performed using FT-IR to understand the mechanism involved in this novel processing method, named PECE (Phonon-Energy-Coupling-Enhancement). By implementing this novel process, the use of SiO2/SiON as gate dielectric can be scaled further in conventional process flow of device fabrication.