International Telemetering Conference Proceedings / October 26-29, 1992 / Town and Country Hotel and Convention Center, San Diego, California / The Space Ground Link Subsystem (SGLS) provides full duplex communications for commanding, tracking, telemetry and ranging between spacecraft and ground stations. The up-link command signal is an S-Band carrier phase modulated with the frequency shift keyed (FSK) command data. The command data format is a ternary (S, 1, 0) signal. Command data rates of 1, 2, and 10 Kbps are used. The method presented uses direct digital synthesis (DDS) to generate the SGLS command data and clock signals. The ternary command data and clock signals are input to the encoder, and an FSK subcarrier with an amplitude modulated clock is digitally generated. The command data rate determines the frequencies of the S, 1, 0 tones. DDS ensures that phase continuity will be maintained, and frequency stability will be determined by the microprocessor crystal accuracy. Frequency resolution can be maintained to within a few Hz from DC to over 2 MHZ. This allows for the generation of the 1 and 2 Kbps command data formats as well as the newer 10 Kbps format. Additional formats could be accommodated through software modifications. The use of digital technology provides for encoder self-testing and more comprehensive error reporting.

In this thesis, novel direct-digital Quadrature Phase Shift Keying (QPSK) modulators are proposed in low-cost Complimentary Metal Oxide Semiconductor (CMOS) technology for radio frequency (RF) wireless applications. Direct-digital architectures have attracted much attention recently as they potentially offer significant cost savings and performance benefits. A new direct-digital QPSK modulator concept is introduced where the carrier is modulated directly by digital data using Pass-Transistor Logic (PTL) circuits for a small size and low power consumption. The concept is demonstrated through the design of an L-band modulator followed by an enhanced tunable S-band version. The proposed L-band modulator first generates all four quadrature phases of the carrier by using a 90° resistor-capacitor, capacitor-resistor (RC-CR) phase shifter followed by two 180° active baluns. One signal from the in-phase components and another from the quadrature-phase components are later selected by two PTL circuits according to the in-phase (I) and quadrature-phase (Q) digital data respectively. Finally the chosen signals are subtracted by a differential amplifier. The circuit has been experimentally demonstrated in a standard 0.18μm CMOS process, showing good performance at 1.7GHz with the data transmission rate and carrier rejection exceeding 20Mbps and 40dB respectively. The integrated circuit (IC) measures only 425μm by 850μm and consumes less than 43mW of power. A new S-band direct-digital QPSK modulator is introduced that offers even better performance and requires fewer components. An active balun first splits the carrier into a pair of balanced signals, which are then fed to a 90° RC polyphase network generating all four differential quadrature signals. Voltage-controlled NMOS resistors are used in the RC polyphase network to fine-tune it after fabrication for the lowest possible phase error. Finally, only one of the four differential quadrature signals is selected by a PTL circuit consisting of six NMOS switches, according to both I and Q digital data values. The circuit has been experimentally demonstrated in a standard 0.18μm CMOS process showing very good performance at 2.4GHz, with the data transmission rate exceeding 56Mbps. The IC measures 720μm by 888μm with an active area of only 505μm by 610μm, and consumes less than 33mW of power. / Thesis (Master, Electrical & Computer Engineering) -- Queen's University, 2007-09-26 15:42:15.243

Thesis (Ph. D.)--Auburn University, 2009. / Abstract. Vita. Includes bibliographical references (p. 84-86).

International Telemetering Conference Proceedings / October 18-21, 2004 / Town & Country Resort, San Diego, California / Hardware architecture and design details of a multi-channel GPS signal simulator with highly flexibility is presented, while the dynamic performance objectives and the requirements on the hardware architecture are discussed. The IF part of the simulator is implemented almost entirely in the digital domain by use of a field programmable gate array (FPGA), which mainly include C/A code generators, carrier generators, spreaders, and BPSK modulators. The results of testing the proposed simulator hardware architecture at IF with the help of a GPS receiver are presented.

International Telemetering Conference Proceedings / October 26-29, 1998 / Town & Country Resort Hotel and Convention Center, San Diego, California / A Phase Modulator combining digital techniques with non-traditional analog circuitry can minimize the shortcomings of a traditional (purely analog) Phase Modulator. These shortcomings are: nonlinear response from input modulating signal to output modulated signal; parameters (frequency and modulation index) that are difficult to set; and the need for complex filters. The design approach discussed in this paper uses a combination of Direct Digital Synthesis (DDS) and analog devices operating in their linear range to generate a Phase Modulated RF (140 MHz) signal. A Numerically Controlled Oscillator (NCO) digitally generates the first IF yielding a very accurate, repeatable and linear signal with easily adjustable parameters such as frequency and modulation index. Linear multipliers (instead of saturated diode mixers or step recovery diodes) are used for up-conversion to RF. Using linear multipliers eases the filtering requirements due to the significantly reduced harmonics and IM (Inter-Modulation) terms. The resulting RF signal is easily translated to higher frequency bands such as L, S, C, X or K.

International Telemetering Conference Proceedings / October 17-20, 1988 / Riviera Hotel, Las Vegas, Nevada / Mission safety and cost-efficiency concerns have resulted in a resurgence of interest in real-time strip chart recorders. But conventional recorder technologies require inordinate maintenance and daily calibration. Attempts at strip chart emulation involving costly dedicated microcomputers and CRT's have failed, because the chart itself is not real-time, a basic requirement. The concept of an inexpensive, direct digital link to a telemetry processing computer (VAX, e.g.) is discussed. A thorough examination of real-time monitoring of critical, non-repeatable data is presented. Objectives: An automated, turn-key telemetry data system. Reduce the routine maintenance required by conventional recording systems; eliminate the need for digital-to-analog converters (DAC's); and improve the efficiency of range personnel and the integrity of recorded data.

In this thesis, a linear interpolation direct digital frequency synthesizer (DDFS) with improved structure to simplify the hardware complexity by correction block is proposed. Correction block is mainly used to compensate for the error curve of linear interpolation DDFS. From the analysis of these error curves, these error curves have similar behavior between each others. After selecting an error curve, the other error curves can be derived and multiplied by a fixed scale. From the simulation results, the correction block using the above method can improve about 12 dB spurious frequency dynamic range (SFDR). The goal of the DDFS designed in this thesis is to achieve 80 dB SFDR. Minimum required number of bits for each block in the proposed DDFS is carefully selected by simulation. In general, DDFS with piecewise linear interpolation theoretically needs 32 segments of piecewise linear interpolation to achieve 84 dB SFDR. In this thesis, 16 segments of piecewise linear interpolation with correction block can achieve the target SFDR. The chip¡¦s simulation is implemented by TSMC standard 0.13um 1P8M CMOS process with core area 78.11 x 77.49 um2.

Large Area Maskless Photopolymerization (LAMP) is a novel additive manufacturing technology currently being developed at Georgia Tech in collaboration with the University of Michigan at Ann Arbor and PCC Airfoils. It is intended for the fabrication of integrally cored ceramic molds for the investment casting of precision components such as high-pressure turbine blades. This dissertation addresses the digital data processing and computational design needs for this technology. Several data processing schemes like direct slicing, STL slicing, post-processing schemes like error checking, part placement and tiling etc. were developed in order to enable the basic functionality of the LAMP process. A detailed overview of these schemes and their implementation details are given in this dissertation. Several computational schemes to improve the quality and accuracy of parts produced through the LAMP process were also implemented. These include a novel volume deviation based adaptive slicing method to adaptively slice native CAD models, a gray scaling and dithering approach to reduce stair stepping effect on downward facing surfaces and a preliminary experimental study to characterize the side curing behavior of the LAMP photo-curable suspension for pre-build image compensation. The implementation details and a discussion of the results obtained using these schemes are given. A novel approach for addressing the “floating island” problem encountered in additive manufacturing was also developed. The need for supports specific to the kind of parts being built through LAMP is evaluated and a support generation strategy different from the previously reported approaches in the literature is presented. Finally, a few novel film cooling schemes that are extremely challenging to fabricate using existing manufacturing technologies but possible to fabricate using LAMP are chosen and analyzed for their cooling performance. It is shown that such novel schemes perform much better in cooling the blade surface than the conventionally implemented schemes and hence this final component of work gives a better appreciation of the impact LAMP technology has in disrupting the state of the art in turbine blade manufacturing and truly taking the blade designs to the next level.

No description available.

No description available.