Paralleling operation of DC/DC converters is widely used in today's distributed power systems. To ensure balanced output currents among paralleled power modules, current sharing control is usually necessary.Active current sharing controls with current feedback mechanism are widely used in today's power supplies. However, the dynamic performance of these current sharing control schemes are not yet clearly explored. In this work, the dynamic current sharing performance is evaluated for paralleling systems with the output impedance approach. As the representative of the terminal characteristic of a power converter, output impedance is a powerful tool to study the dynamic response under load transients. The dynamic current sharing analyses are then conducted for three different active current sharing control structures and a comprehensive comparison among them helps the designer to choose appropriate controls for different applications. On the other hand, high-frequency load transients are possible to happen for voltage regulators, which are the power supplies of microprocessors. In order to study the dynamic current sharing performance for a paralleling system when the perturbation frequency is higher than half of the switching frequency,the conventional output impedance concept needs to be extended. Due to the non-linear behavior of a switching modulator, the beat-frequency phenomenon could cause unexpected failure of a power supply when the perturbation frequency is close to the switching frequency. To address this issue, an unconventional multi-frequency model is proposed for high-frequency dynamic current sharing studies. With this model, the sideband components are possible to be included and the beat-frequency oscillations can be predicted. After that, the conventional impedance concept is expanded in the form of extended describing function, so that the terminal characteristics of paralleled converters are represented by a series of impedances. Besides the analyses, this work also proposed several solutions for the beat-frequency oscillation issue which are experimentally verified. In summary, both low-frequency and high-frequency dynamic current sharing performances are studied in this dissertation. The output impedance concept and its extension in the form of extended describing function are utilized as the tools for researches. With these powerful tools, more insights are obtained to help better design of a paralleling system. / Ph. D.

In the early 1990's, with the boom of the Internet and the advancements in telecommunications, the demand for high-speed communications systems has reached every corner of the world in forms such as, phone exchanges, the internet servers, routers, and all other types of telecommunication systems. These communication systems demand more data computing, storage, and retrieval capabilities at higher speeds, these demands place a great strain on the power system. To lessen this strain, the existing power architecture must be optimized. With the arrival of the age of high speed and power hungry microprocessors, the point of load converter has become a necessity. The power delivery architecture has changed from a centralized distribution box delivering an entire system's power to a distributed architecture, in which a common DC bus voltage is distributed and further converted down at the point of load. Two common distributed bus voltages are 12 V for desktop computers and 48 V for telecommunications server applications. As industry strives to design more functionality into each circuit or motherboard, the area available for the point of load converter is continually decreasing. To meet industries demands of more power in smaller sizes power supply designers must increase the converter's switching frequencies. Unfortunately, as the converter switching frequency increases the efficiency is compromised. In particular, the switching, gate drive and body diode related losses proportionally increase with the switching frequency. This thesis introduces a loss saving self-driven method to drive the secondary side synchronous rectifiers. The loss saving self-driven method introduces two additional transformers that increase the overall footprint of the converter. Also, this thesis proposes a new magnetic integration method to eliminate the need for the two additional gate driver magnetic cores by allowing three discrete power signals to pass through one single magnetic structure. The magnetic integration reduces the overall converter footprint. / Master of Science

Front-end converters with power factor correction (PFC) capability are widely used in distributed power systems (DPSs). Most of the front-end converters are implemented using a two-stage approach, which consists of a PFC stage followed by a DC/DC converter. The purpose of the front-end converter is to regulate the DC output voltage, supply all the load converters connected to the distributed bus, guarantee current sharing, and charge a bank of batteries to provide backup energy when the power grid breaks down. One of the main concerns of the power supply industry is to obtain a front-end converter with a low-cost PFC stage, while still complying with required harmonic standards, especially for high-power three-phase applications. Having this statement in mind, the main objective of this dissertation is to study front-end converters for DPS applications with PFC to meet harmonic standards, while still maintaining low cost and performance indices. To realize the many aforementioned objectives, this dissertation is divided into two main parts: (1) two-stage front-end converters suitable for telecom applications, and (2) single-stage low-cost AC/DC converters suitable for mainframe computers and server applications. The use of discontinuous conduction mode (DCM) boost rectifiers is extensively explored to achieve simplicity, while reducing the cost for DPS applications. Interleaving of DCM boost rectifiers is also explored as an alternative approach to further reduce the system cost by reducing the filtering requirements. All the solutions discussed are implemented for 3kW applications, while 6kW is obtained by interleaving two converters. / Ph. D.

L'émergence et le développement des systèmes électriques de ces vingt dernières années nous ont conduits à l'élaboration d'architectures de plus en plus complexes. Nous les retrouvons notamment au niveau d'applications embarquées ainsi qu'au cœur de réseaux de distribution isolés. L'intégration de nombreux équipements de différentes natures soulève la problématique de la stabilité. C'est dans ce contexte que s'insèrent ces travaux de thèse, qui aboutissent sur la mise en œuvre de méthodes d'analyse de la stabilité et de la qualité des réseaux distribués de puissance. Les études menées au cours de ces travaux reposent sur des expressions analytiques représentant le comportement fréquentiel de réseaux continus. Ces modèles sont ensuite associés au critère de Routh-Hurwitz, afin de permettre les études de stabilité selon les évolutions de leurs paramètres. L'analyse des résultats obtenus au niveau d'architectures présentant plusieurs équipements permet d'affiner nos connaissances sur le fonctionnement de ces systèmes. Les phénomènes de couplage, la disposition d'un réseau en fonction du nombre et de la puissance des charges, du point de vue de la stabilité, sont notamment développés. Les recherches de dimensionnements optimaux de plusieurs éléments indéterminés, combinant les notions de stabilité et de qualité et réalisées à l'aide d'algorithmes d'optimisation, sont également présentées. Enfin, les parties fondamentales de ces travaux, que constituent la modélisation ainsi que l'étude de la stabilité, sont validés par une approche expérimentale. / The emergence and the development of electrical systems during these last twenty years have led us to the elaboration of more and more complex architectures. They can be particularly found on embedded applications as well as in the heart of isolated distribution networks. The integration of several equipments with various natures raises the problem of stability. Thesis work presented here fits in with this context, leading to the implementation of stability and quality analysis methods, applied to distributed power networks. Studies led during this work are based on analytical expressions representing the continuous networks frequency behaviour. These models are then associated to the Routh-Hurwitz criterion in order to allow stability studies, according to their parameter values evolution. Analysis of results obtained on networks architectures using several equipments allows the refinement of our knowledge on these systems operation. Coupling phenomena, network layout according the loads number and power from a stability point of view, are particularly developed. Optimal sizing research for several undetermined elements, merging stability and quality criteria and carried out using optimization algorithms, is also presented. Finally, fundamental parts of this work which correspond to models building as well as stability studies are validated by an experimental approach.

One of the requirements for the next generation of power supplies for distributed power systems (DPSs) is to achieve high power density with high efficiency. In the traditional front-end converter based on the two-stage approach for high-power three-phase DPSs, the DC-link voltage coming from the power factor correction (PFC) stage penalizes the second-stage DC/DC converter. This DC/DC converter not only has to meet the characteristics demanded by the load, but also must process energy with high efficiency, high reliability, high power density and low cost. To meet these requirements, approaches such as the series connection of converters and converters that reduce the voltage stress across the main devices have been proposed. In order to improve the characteristics of these solutions, this dissertation proposes high-efficiency, high-density DC/DC converters for high-power high-voltage applications. In the first part of the dissertation, a DC/DC converter based on a three-level structure and operated with pulse width modulation (PWM) phase-shift control is proposed. This new way to operate the three-level DC/DC converter allows soft-switching operation for the main devices. Zero-voltage switching (ZVS) and zero-voltage and zero-current switching (ZVZCS) soft-switching techniques are studied, analyzed and compared in order to improve the characteristics of the proposed converter. This results in a series of ZVS and ZVZCS three-level DC/DC converters for high-power high-voltage applications. In all cases, results from 6kW prototypes operating at 100 kHz are presented. In addition, with the ultimate goal of improving the power density of the DC/DC converter, a study of several resonant DC/DC converters that can operate at higher switching frequencies is presented. From this study, a three-element ZVS three-level resonant converter for applications with wide input voltage and load variations is proposed. Experimental results at 745 kHz obtained without penalizing the efficiency of the PWM approaches are presented. The second part of the dissertation proposes a quasi-integrated AC/DC three-phase converter that aims to reduce the complexity and cost of the traditional two-stage front-end converter. This converter improves the complexity/low-efficiency tradeoff characteristics evident in the two-stage approach and previous integrated converters. The principle of operation for the converter is analyzed and verified on a 3kW experimental prototype. / Ph. D.