Conventional processor design utilizes a central register file and a bypass network to deliver operands to and from functional units, which cannot scale to a large number of functional units. As more functional units are integrated into a processor, the number of ports on a register file grows linearly while area, delay, and energy consumption grow even more rapidly. Physical properties of a bypass network scale in a similar manner. In this dissertation, a fully distributed register file organization is presented to overcome this limitation by relying on small register files with fewer ports and localized operand bypasses. Unlike other clustered microarchitectures, each cluster features a small single-issue functional unit coupled with a small local register file. Several clusters are used, and each of them can be different. All register files are connected through a register transfer network that supports multicast communications. Techniques to support distributed register file operations are presented for both dynamically and statically scheduled processors. These include the eager and multicast register transfer mechanisms in the dynamic approach and the global data routing with multicasting algorithm in the static approach. Although this organizaiton requires additional cycles to execute a program, it is compensated by significant savings obtained through smaller area, faster operand access time, and lower energy consumption. With faster operating frequency and more efficient hardware implementation, overall performance can be improved. Additionally, the fully distributed register file organization is applied to an ILP-SIMD processing element, which is the major building block of a massively parallel media processor array. The results show reduction in die area, which can be utilized to implement additional processing elements. Consequently, performance is improved through a higher degree of data parallelism through a larger processor array. In summary, the fully distributed register file architecture permits future processors to scale to a large number of functional units. This is especially desirable in high-throughput processors such as wide-issue processors and multithreaded processors. Moreover, localized communication is highly desirable in the transition to future deep submicron technologies since long wire is a critical issue in processes with extremely small feature sizes.

Dans cette thèse on s’intéresse à un modèle de faute Byzantins Mobiles. Jusqu’à présent, seulement le problème du Consensus a été résolu en présente de faute Byzantines Mobiles et plusieurs variations de ce modèle de faute ont été proposé. Pour chacun de ces modelés ont été prouvées les bornes inferieures du nombre de processus correct nécessaire et des solutions asymptotiquement optimales ont été proposées. Notre première contribution porte sur les registres repartis dans ce modèle. Les registres repartis sont l’abstraction à la base du stockage reparti. Ces résultats préconisent donc notre deuxième contribution principale, un modèle de faute Byzantine Mobile généralisé. Notre troisième contribution est un ensemble de preuves de nécessité et d’impossibilité pour les registres repartis dans ces modèles. En particulier on prouve qu’il n’est pas possible d’implémenter la spécification plus faible des registres dans un système asynchrone. Par contre, pour les systèmes synchrones, on prouve des bornes inferieures et propose des protocoles asymptotiquement optimaux pour le registrer régulier. Pour conclure, notre dernière contribution porte sur le problème d’accord approximé, une forme affaiblie du consensus. On résout ce problème dans le modèle basé sur ronde, le même du consensus. En outre, il est intéressant de noter qua dans le modèle statique, la borne inferieure sur le nombre de répliques est la même pour le consensus et pour le problème d’accord approximé. Le même invariant s’applique avec les fautes byzantine mobiles. De plus, on accompagne ces bornes inferieures avec une solution asymptotiquement optimale pour le problème d’accord approximé. / In this thesis we consider a model where Byzantine failures are not fixed, we consider the so called Mobile Byzantine failures. So far, only Consensus problem has been solved in presence of Mobile Byzantine failures and interestingly different variations of this failure model have been proposed. For each of them have been proved lower bounds on the number of required processes and have been proposed tight solutions. Our first contribution concerns distributed Registers in such strong model. Distributed Registers are the basic abstraction for Distributed Storages. This advocates our second and main contribution, a general Mobile Byzantine Failure Model. Our main focus is about Distributed Registers, so our third contribution comes, we prove necessities and impossibilities in those models. In particular we prove that is it not possible to solve the weakest register specification in an asynchronous system. On the other side we prove lower bounds for the synchronous system, with respect to the proposed hierarchy models, and tight protocols to solve the Regular Register problem. To conclude, our last contribution is about the Approximate Agreement problem, a weaker form of Consensus. We solve such problem in the same round-based models as Consensus so far. The interesting result is the following, in presence of static Byzantine failures, lower bounds on the number of correct replicas does not change between consensus and approximate agreement. The same invariant still holds in presence of Mobile Byzantine failure. Moreover, along with lower bounds we propose a tight solution to solve approximate agreement.