The Worldwide Interoperability for Microwave Access, or WiMax, is a wireless communication technique based on IEEE 802.16 standards. Its advantage of sending high data rates over long distances, while using a single base station to cover a large area, has made this technique a flexible and reliable solution for public wireless networks. WiMax has two main types of networks: Fixed and Mobile. The most popular transceiver used in WiMax applications is the “Direct-Conversion Architecture” due to its high level of integration and less component requirements, which leads to reduced power dissipation. In Direct Conversion Architecture, the mixer is a key block in the transceiver chain. Depending on design specifications and constraints, different types of mixers may be considered. However, the most appropriate down converter mixer for WiMax applications is the Gilbert-cell mixer. This thesis will then explore the design of a down converter Gilbert-Cell Mixer within the realm of Fixed WiMax technology. This design was achieved in the commercial circuit simulator Advanced Design System (ADS) using the 0.15mm InGaAs pHEMT technology process provided by Win Semiconductor Crop.

The Worldwide Interoperability for Microwave Access, or WiMax, is a wireless communication technique based on IEEE 802.16 standards. Its advantage of sending high data rates over long distances, while using a single base station to cover a large area, has made this technique a flexible and reliable solution for public wireless networks. WiMax has two main types of networks: Fixed and Mobile. The most popular transceiver used in WiMax applications is the “Direct-Conversion Architecture” due to its high level of integration and less component requirements, which leads to reduced power dissipation. In Direct Conversion Architecture, the mixer is a key block in the transceiver chain. Depending on design specifications and constraints, different types of mixers may be considered. However, the most appropriate down converter mixer for WiMax applications is the Gilbert-cell mixer. This thesis will then explore the design of a down converter Gilbert-Cell Mixer within the realm of Fixed WiMax technology. This design was achieved in the commercial circuit simulator Advanced Design System (ADS) using the 0.15mm InGaAs pHEMT technology process provided by Win Semiconductor Crop.

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In the current and next generation automotive telematic platforms, high demands are put on high efficiency power supplies. This thesis investigates different switch mode power converter solutions that operates with high efficiency for both low and high power loads. A market survey was conducted alongside meetings with ACTIA Nordic and their subcontractors. Three solutions from the market survey were selected for further investigation. One solution from the investigation was selected and implemented as a demonstration platform for further testing. The result shows a full test sequence for the designed power supply solution.

This master´s thesis is dealing with the theory of Li-ion accumulators and theirs charching. In this thesis has been designed accumulator tester for automatic charging and discharging of Li-ion accumulator. This tester is controlled by microprocessor.

International Telemetering Conference Proceedings / October 28-31, 1996 / Town and Country Hotel and Convention Center, San Diego, California / In this paper design and development of a PC- Based S- Band Down Converter/ FM Telemetry Receiver are discussed. With the advent of Direct Digital Synthesis (DDS) & Phase Locked Loop (PLL) technology, availability of GaAs & Silicon MMICs, Coaxial Resonator Oscillator (CRO), SAW Oscillator, SAW Filters and Ceramic Filters, realisation of single card PC- Based Down Converter and Telemetry Receiver has become a reality. With the availability of Direct Digital Synthesis and Phase Locked Loop devices having microprocessor bus compatibility, opens up many application in Telemetry and Telecommunications. In this paper design of local oscillator based on hybrid DDS & PLL technique, Coaxial Resonator Oscillator and Front-end are discussed in detail.

In this thesis we discuss design and implementation of low-complexity digital filters. Digital filters are key components in most digital signal processing (DSP) systems and are, for example, used for interpolation and decimation. A typical application for the filters considered in this work is mobile communication systems, where high throughput and low power consumption are required. In the first part of the thesis we discuss implementation of high throughput lattice wave digital filters (LWDFs). Here arithmetic transformation of first- and second-order Richards’ allpass sections are proposed. The transformations reduces the iteration period bound of the filter realization, which can be used to increase the throughput or reduce the power consumption through power supply voltage scaling. Implementation of LWDFs using redundant, carry-save arithmetic is considered and the proposed arithmetic transformations are evaluated with respect to throughput and area requirements. In the second part of the thesis we discuss three case studies of implementations of digital filters for typical applications with requirements on high throughput and low power consumption. The first involves the design and implementation of a digital down converter (DDC) for a multiple antenna element radar receiver. The DDC is used to convert a real IF input signal into a complex baseband signal composed of an inphase and a quadrature component. The DDC includes bandpass sampling, digital I/Q demodulation, decimation, and filtering and three different DDC realizations are proposed and evaluated. The second case study is a combined interpolator and decimator filter for use in an OFDM system. The analog-to-digital converters (ADCs) and the digital-to-analog converters (DACs) work at a sample rate twice as high as the Nyquist rate. Hence, interpolation and decimation by a factor of two is required. Also, some channel shaping is performed which complicates the filter design as well as the implementation. Frequency masking techniques and novel filter structures was used for the implementation. The combined interpolator and decimator was successfully implemented using an LWDF in a 0.35 mm CMOS process using carry-save arithmetic. The third case study is the implementation of a high-speed decimation filter for a SD ADC. The decimator has an input data rate of 16 Gsample/s and the decimation factor is 128. The decimation is performed using two cascaded digital filters, a comb filter followed by a linear-phase FIR filter. A novel hardware structure for single-bit input digital filters is proposed. The proposed structure was found to be competitive and was used for the implementation. The decimator filter was successfully implemented in a 0.18 mm CMOS process using standard cells. In the third part of the thesis we discuss efficient realization of sum-of-products and multiple-constant multiplications that are used in, for example, FIR filters. We propose several new difference methods that result in realizations with a low number of adders. The proposed design methods have low complexity, i.e., they can be included in the search for quantized filter coefficients.

Les télécommunications par satellite prennent aujourd’hui de en plus d’importance, et le nombre d’abonnés à travers le monde ne cesse de croître. Partout où la fibre optique ne peut être déployée, elles sont un moyen fiable de fournir des débits très élevés aux utilisateurs, dont les pratiques nécessitent des bandes passantes toujours plus importantes (vidéo HD, visioconférences, téléchargement, cloud computing, jeux en ligne...). Elles garantissent également de très vastes zones de couverture. Pour les concepteurs de charges utiles de satellite, suivre les besoins du marché revient à augmenter constamment le nombre d’équipements embarqués, ce qui affecte le volume et la masse des systèmes et donc le coût de mise en orbite. Une des solutions envisagées afin de contrer ce phénomène consiste à employer des technologies optiques. Il a été démontré par Thales Alenia Space que pour un système de distribution de signaux de référence de 1 vers 64 équipements, la réduction du poids pourrait être de 70 %. Dans ce contexte nous avons développé 7 convertisseurs de fréquence RF réalisés à partir de composants photoniques semi-conducteurs. Ces convertisseurs font partie des composants clés des charges utiles car ils permettent d’isoler les transmissions montantes (vol vers satellite) et descendantes (satellite vers sol) afin d’éviter les interférences. Les performances des 7 architectures proposées, réalisées à partir de modulateurs électro-absorbants (EAM) et d’amplificateurs optiques à semi-conducteurs (SOA) ont été évaluées au travers de différentes simulations et en calculant le gain de conversion, le facteur de bruit, les isolations RF/FI et OL/FI, les rapports C/I3 et les coordonnées du point d’interception d’ordre 3. Nous avons obtenu des performances intéressantes, premières données pour de futures études et montré que ces convertisseurs seraient compatibles avec de nombreux plans de fréquence en bandes Ku/Ku, Ku+/Ku, et Ka/Ka. Des manipulations ont également permis de valider les modèles théoriques employés dans les simulations. / Nowadays, Satellite telecommunications are becoming very popular and the number of subscribers worldwide is always growing. Wherever the optical fiber cannot be deployed, they are a reliable way to provide very high data rates to the users, whose activities are becoming more and more bandwidth-hungry (HD video, video conferencing, downloading, cloud computing, online games ...). They also guarantee very large coverage areas. In order to follow the market needs satellite payload designers have to increase the number of on-board equipment, which affects the volume and mass of the systems and therefore the launching cost. One of the solutions to solve the problem consists in using optical technologies. It has been demonstrated by Thales Alenia Space that In the case of a reference signal distribution system for 64 devices, a weight reduction of about 70% could be obtained. In this context we have developed 7 RF frequencydown-converters based on photonic semiconductor components. The down-converters are key components of satellite payloads, as their aim is to isolate uplink transmissions (ground to satellite) and downlink (satellite to ground) to avoid interference. Performance of the 7 architectures, incorporating electro-absorption modulators (EAM) and semiconductor optical amplifiers (SOA) were evaluated through various simulations and by calculating the conversion gain, noise figure, RF/IF and LO/IF isolations, the C/I3 ratio and the coordinates of the third order intercept point. We obtained interesting results, first data for futur works,and showed that these converters are compatible with many frequency plans in Ku/Ku, ku+/Ku, and Ka/Ka bands. Manipulations were also led and validated the theoretical models used in simulations.

The thesis deals with lithium accumulators with electronics, which are composed to a unit called Intelligent Battery. Within this thesis, the main features of these accumulators are explained and the circuit to monitor these accumulators has been designed and manufactured, it can disconnect them when the parameters are exceeded, and it stores the history of the battery measurement in memory. It also allows reading of current and logged battery data via UART. The computer application is designed for communication, to display the information and to adjust the battery circuit parameters. The electronics secure charging when the 24V adapter is connected according to the set parameters and it also secure balancing of the individual accumulators.

This master‘s thesis deals with the design of battery powered soldering iron. The soldering iron will be placed in the plastic box from a conventional transformer soldering iron. First, we need to find the parameters of the original transformer soldering iron. Then design a synchronous step-down converter, driver of converter, BMS circuits, and component placement in a plastic box. The battery-powered soldering iron was successfully revived and tested, the final parameters of the converter are: voltage 0.4 V at 80 A current. The total power on the soldering wire is 32 W. Technically, this is a very interesting alternative to the classic version of the soldering iron, which can be used for assembly or repairs in poorly accessible locations.