No description available.

No description available.

With the introduction of high speed semiconductor power devices and the increased application of adjustable speed drives (ASDs) for efficient speed control of ac motors, there has been a growing number of costly motor-drive related process failures. It has been found that the high dv/dt and high switching frequency have caused premature motor insulation failures due to motor terminal over-voltages (exacerbated by longer cable lengths). It is also acknowledged that high dv/dt and high frequency common-mode voltages generated by pulse-width modulated (PWM) inverters contribute significantly to electromagnetic interference (EMI) and may also cause damaging bearing and leakage currents. In response to these problems, a variety of mitigation techniques have been proposed in the past. However, the known solutions usually address these problems one at a time and some of the mitigation techniques are not highly effective. The major objective of this research is to search for solutions to these ASD application issues with an emphasis on solving all of the problems at the source. Therefore, theoretical analysis of all the above adverse effects are presented and the existing mitigation techniques are evaluated in this dissertation. It is found that common-mode voltage is the major cause of both bearing currents and the conducted EMI, thus the research is focused on new inverter topologies and control strategies in order to eliminate the common-mode voltage. To achieve the goal of common-mode voltage cancellation, a novel dual-bridge inverter (DBI) is proposed and studied. The DBI employs an additional inverter output stage to drive a standard three-phase dual-voltage induction motor and is controlled to generate balanced excitation of the motor resulting in a zero common-mode voltage. It is shown through experimental results that the motor bearing current is eliminated and the conducted EMI is significantly reduced. In addition to the DBI, multilevel inverter topologies have also been studied. It has been found in this research that with proper selections of the switching states, certain multilevel PWM inverters will not generate common-mode voltages. This new control method is verified in simulation by using both sine-triangle intersection PWM (SPWM) and voltage space-vector modulation (SVM). / Graduation date: 1999

Thesis (Ph. D.)--University of Washington, 2003. / Vita. Includes bibliographical references (leaves 94-97).

Thesis (M.S.)--West Virginia University, 2003. / Title from document title page. Document formatted into pages; contains x, 100 p. : ill. (some col.). Vita. Includes abstract. Includes bibliographical references (p. 82-84).

No description available.

The correct operation of adjustable speed drives, which form part of a larger system, is often essential to the operation of the system as a whole. In certain applications the failure of such a drive could result in a threat to human safety and these applications are termed 'safety critical'. The chance of a component failure resulting in non-operation of the drive can be dramatically reduced by adopting a fault tolerant design. A fault tolerant drive must continue to operate throughout the occurrence of any single point failure without undue disturbance to the power output. Thereafter the drive must be capable of producing rated output indefinitely in the presence of the fault. The work presented in this thesis shows that fault tolerance can be achieved without severe penalties in terms of cost or power to mass ratio. The design of a novel permanent magnet drive is presented and a 'proof of concept' demonstrator has been built, based on a 20 kW, 13000 RPM aircraft fuel pump specffication. A novel current controller with near optimal transient performance is developed to enable precise shaping of the phase currents at high shaft speeds. The best operating regime for the machine is investigated to optimise the power to mass ratio of the drive. A list of the most likely electrical faults is considered. Some faults result in large fault currents and require rapid detection to prevent fault propagation. Several novel fault sensors are discussed. Fault detection and identification schemes are developed, including new schemes for rapid detection of turn to turn faults and power device short circuit faults. Post fault control schemes are described which enable the drive to continue to operate indefinitely in the presence of each fault. Finally, results show the initially healthy drive operating up to, through and beyond the introduction of each of the most serious faults.

Thesis (doctor)--Technische Universiteit Delft, 1997. / Vita. Includes bibliographical references (p. [153]-162).

Thesis (Ph. D.)--Ohio State University, 2003. / Title from first page of PDF file. Document formatted into pages; contains xiii, 166 p.: ill. Includes bibliographical references (p. 159-166). Available online via OhioLINK's ETD Center.

Thesis (Ph. D.)--Oregon State University, 2004. / Printout. Includes bibliographical references (leaves 75-79). Also available on the World Wide Web.