Thesis (doctor)--Technische Universiteit Delft, 1997. / Vita. Includes bibliographical references (p. [153]-162).

The purpose of this thesis was to explore the behavior in power sharing and control of Hybrid Motor Drives. In this research, a solar-based hybrid adjustable-speed pump, which has been developed in the laboratory, was used to investigate the power-sharing in hybrid (dual-input) motor-drive systems. The laboratory test setup contained a DC-DC module connected to the DC-bus capacitors of a 2.5hp 230V PWM-based adjustable-speed motor-drive. The experimental results demonstrate that the power-sharing of a Photovoltaic (PV) array/DC-DC converter is not a function of motor speed in hybrid solar-based motor-drives, as long as the power contribution of the AC-grid stays above zero. In these conditions, the PV-DC-DC module behaves like a current source, and the dynamic behavior of the motor is decoupled from the dynamic behavior of the AC-grid, given that the PV-DC-DC module can provide the motor load.

This thesis presents a unified nonlinear optimization based speed and position estimation method in position sensorless control of interior permanent magnet synchronous motor (IPMSM) drives at wide speed range including standstill. The existing electromotive force (EMF) based sensorless methods are suitable for medium and high speed operation, but they can't be applied at low speed and standstill condition due to the reduced EMF values. The conventional saliency tracking based sensorless methods usually employ the continuous voltage or current injection at low speed including standstill condition. However, these methods degrade at high speed by introducing higher loss and torque ripples caused by the injection. Additionally, the initial rotor position needs to be detected at the machine startup to avoid the reverse rotation and to guarantee the delivery of the expected torque. Therefore, different position estimation techniques need to be combined in the controller at wide speed range, which increases the control system complexity. Hence, a unified nonlinear optimization based speed and position estimation method is proposed. At startup and standstill conditions, three steps are employed for initial position estimation. Step I employs pulse voltage injection in the stationary reference frame and a cost function which contains the knowledge of initial rotor position. The rotor position can be estimated by minimizing the cost function with injected voltage and induced current. Since the estimation results in Step I have an ambiguity of 180 degree, a generalized approach to magnetic polarity detection which exploits asymmetries in machine specific differential inductance profiles is employed as Step II. In order to improve the estimation accuracy, continuous sinusoidal voltage is injected in estimated rotor reference frame in Step III. A modified cost function is minimized based on the injected voltage and resulting current. At running state, cost functions which employ both speed and position as decision variables are proposed and utilized for estimation. The speed and position estimation can be delivered by minimizing the proposed cost functions based on the measurements of the stator voltage and current. Since only one position estimator exists in the drive system, the speed and position estimation is unified at wide speed range. The feasibility of the proposed estimation algorithms is validated with the prototype 5 KW IPMSM drives test bench. In order to benchmark the proposed estimation method, the performance of the proposed method was compared with existing sensorless control methods on the same prototype IPMSM drives test bench. Under the same test conditions, the proposed method outperforms with improved transient performance and steady state accuracy. Moreover, the proposed method is capable of delivering estimation with different voltage injection types and involving the nonlinear motor parameters, which makes this method more flexible in practice. Additionally, the capability of estimating speed and position with low sampling frequency also makes the application of the proposed method promising in high power AC motor drive systems. / Thesis / Doctor of Philosophy (PhD)

This study develops the foundation of a digitally implemented control system for the radial positioning of the read/write heads of an optical disk drive system. Topics addressed are: sample rate selection, state reconstruction, closed-loop system response, disk track-following filters, and measurement noise filters. Consideration is given to the unmodeled dynamic's influence on system performance, system sensitivity to parameter variations, and a one sample computational delay. What has been concluded from this work is that the system must be further desensitized to parameter variations, and, at this stage of the development of the control scheme, neither a computational delay nor the unmodeled dynamics degrade system performance significantly.

Student Number : 9811492X - MSc dissertation - School of Electrical and Information Engineering - Faculty of Engineering and the Built Environment / This dissertation discusses the development of an ATP model of a network to aid measurement techniques in a harmonic evaluation. A theoretical back- ground discussion of various pieces of equipment and their signi#12;cance to har- monics is included. National Electricity Regulator (NRS 048) standards are discussed with refer- ence to performing a basic investigation and short comings. A test study was performed on the Brandspruit Mine in Secunda. ATP models are developed for equipment relevant to the test case, these in- clude AC{AC converters, AC{DC converters, three phase transformers and cables. Finally the measured test case is compared to simulation results and conclusions drawn.

The awareness of electric power quality has increased over the past decade as electronic equipment has become more susceptible to power disturbances. The most disruptive power disturbances are voltage sags and momentary interruptions and their effect on adjustable speed drives (ASDs) is studied in this thesis. Several solutions have been suggested to provide only voltage sag ride-through to ASDs, but most solutions focus on ASDs with passive rectifiers since they hold the largest share of the market. This thesis focuses on ASDs with active rectifiers, which is an emerging and growing market due to the advantages of four quadrant operation and reduced harmonics offered. A solution is presented which provides an ASD with an active rectifier with the capability to ride through the most common sags in order to reduce the frequency at which the ASD trips and thereby increase its reliability. In order to provide ASDs with the capability to ride through momentary interruptions, it is necessary to interface an energy storage system to the ASD. Flywheels, ultra-capacitors and batteries are evaluated for use in an energy storage system to provide voltage sag and momentary interruption ride-through and a detailed comparison of six systems based on these technologies is presented. The interface circuit between the energy storage system and ASD has a significant influence on the performance of the energy storage system and therefore interface circuits to ASDs with passive and active rectifiers are studied. The addition of an ultra-capacitor energy storage system to an ASD with an active rectifier in order to provide ride-through of deeper sags and momentary interruptions is studied and a fuzzy logic controller is designed to enhance system performance. Initially, no communication between the ASD and the ultra-capacitor system is assumed and the ultra-capacitor system can therefore be added as a retro-fit to an existing ASD. It is, however, foreseen that the market for ASDs with ride-through capability of voltage sags and momentary interruptions will grow and the concepts for an integrated design of an ASD and an energy storage system are presented. / Graduation date: 1999

The continuing desire of industry to further improve process efficiency, through tighter control and energy conservation, has prompted users to pay closer attention to Adjustable Speed Drives (ASDs). The conventional ASDs consist of induction or synchronous motors controlled by power electronic controllers through the adjustment of supply frequency and line voltage. The drawback of these conventional ASDs lies in the high cost of the power electronic controllers which have the same rating as that of the machine itself. The Brush less Doubly-Fed Machine (BDFM) ASD has proven, both analytically and experimentally, to provide a cost effective and a wide range of precise speed control. The experimental BDFM prototypes built to date were designed and constructed individually based on designers' experience with self-cascaded machines. The success with these prototypes has promoted the idea of standardizing the design procedure for all future BDFMs. This thesis offers a general design procedure for the BDFM, which can serve as a first step in standardizing the manufacturing process of this machine. The procedure is presented in the form of a demonstration, by applying it to the design of a 60-hp, 600 to 900 r/min, 460-volts BDFM pump drive to replace the currently utilized conventional 60-hp wound rotor induction motor ASD. An ideal design, which determines machine details such as physical dimensions, slot specifics and conductor details based on conservative magnetic and electric loading assumptions, is one form of the design procedure. The other form, the practical design, involves utilizing a specified physical dimensions and slot details to determine the associated conductors' details and to insure the compliance of machine loadings with up-to-date industrial standards. In both procedures, the design will be made to satisfy, if not to exceed, the existing conventional drive performance. / Graduation date: 1994

Higher data rate hard disk drives(HDD) and improved read channel electronics are demanding preamplifier performance be extended well beyond 1 Gb/s. Historically, preamplifier power requirements were of low priority; however, with increased demand for battery powered devices such as laptops, MP3 players, personal video recorders, andmanyother wireless hand-held devices, power consumption has become an important design parameter.Furthermore, in order to continue to increase drive capacities, new read-write head technologies(vertical recording and TGMR heads) are demanding innovative preamplifier circuitsolutions.Today's production preamplifiers possess a wide band response of 2.5 MHz-600 MHz; however next generation preamplifiers willrequire response greater than 250 KHz-1 GHz.Low corner frequencies below 250 KHz present read recovery (sleep-to-read, write-to-read, etc) challenges which can limit drive capacity. This project targets a > 2 Gb/s TGMR (tunneling giantmagneto-resistive) read path for verticalrecording HDDs. A high performance BiCMOS process (IBM's 0.5?m 5HP process)is essential due to the large transconductances, low noise and highspeed requirements of the read path's first stage. System frequency limitations at the input are a result of the large TGMR read sensor and preamplifier input capacitance. Due to read head and preamplifier manufacturingvariations, resistive feedbackaroundthe firststage is usedto seta controlled input impedance targeted to match the interconnect transmission line. Head resistance variations lead to gain variations; however, the TGMR element becomes more sensitive with larger resistance. This, to a first order approximation, acts like an automatic gain control and reduces variations in gain due to the head.

Adjustable-speed drives (ASDs) are often used in commercial and industrial facilities to improve process control and save energy. However, ASDs are the sensitive load equipment as regards to voltage sag. During the sag, the dc-bus capacitor of a typical ASD will discharge depending on the loading condition. The voltage of the dc bus decreases and could lead to a trip of the device. In order to understand the voltage sag tolerance capability of ASDs. Based on IEC 61800-3 and IEC 61000-4-11, this research presents the test results of ASD subjected to voltage sags under different operating conditions. The tests focus on different types of voltage sags, operating situations and designs of ASDs.

Higher data rate hard disk drives(HDD) and improved read channel electronics are demanding preamplifier performance be extended well beyond 1 Gb/s. Historically, preamplifier power requirements were of low priority; however, with increased demand for battery powered devices such as laptops, MP3 players, personal video recorders, andmanyother wireless hand-held devices, power consumption has become an important design parameter.Furthermore, in order to continue to increase drive capacities, new read-write head technologies(vertical recording and TGMR heads) are demanding innovative preamplifier circuitsolutions.Today's production preamplifiers possess a wide band response of 2.5 MHz-600 MHz; however next generation preamplifiers willrequire response greater than 250 KHz-1 GHz.Low corner frequencies below 250 KHz present read recovery (sleep-to-read, write-to-read, etc) challenges which can limit drive capacity. This project targets a > 2 Gb/s TGMR (tunneling giantmagneto-resistive) read path for verticalrecording HDDs. A high performance BiCMOS process (IBM's 0.5?m 5HP process)is essential due to the large transconductances, low noise and highspeed requirements of the read path's first stage. System frequency limitations at the input are a result of the large TGMR read sensor and preamplifier input capacitance. Due to read head and preamplifier manufacturingvariations, resistive feedbackaroundthe firststage is usedto seta controlled input impedance targeted to match the interconnect transmission line. Head resistance variations lead to gain variations; however, the TGMR element becomes more sensitive with larger resistance. This, to a first order approximation, acts like an automatic gain control and reduces variations in gain due to the head.