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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Design of the Superscalar Dual-Core Architecture using Single-Issue Out-of-Order Instruction Pipe for Embedded System

Lai, Yu-ren 29 July 2009 (has links)
With the improvement in VLSI technology, realization of multiple processor cores on a single chip becomes easier. Therefore, more and more users execute applications on current multi-core architectures. The multi-core system has a brilliant performance in executing multi-threaded applications, but this system could not gain any performance in single-threaded applications. This paper proposes a multi-core architecture for enhancing single-threaded performance in embedded system, and focuses on four points: 1. Construct a simple out-of-order execution core. 2. Design a dynamically scheduled instruction analyzer. 3. Design a mechanism for sharing operands between two cores. 4. Design a mechanism for committing instructions synchronously between two cores. The architecture of each core is single-issue out-of-order instruction pipe. First, instruction analyzer will fetch instructions and generate instruction dependence tags by detecting the dependencies among the fetched instructions, then schedule instructions dynamically and dispatch to the cores. In the core, instructions can know where to get required operands according to the information of instruction tags, this mechanism enables data can be shared between two cores. Instructions are executed by data-driven approach, but in-order complete to maintain the correctness of the program order. Based on ARM instruction set, this paper tries to explore ways to achieve interaction control mechanisms between two cores and to accelerate a single-thread in the dual-core architecture. We write a simulation model of the proposed architecture in C language as our trace-driven simulation framework and the MediaBench suite is selected for the experiments. According simulation result, the architecture can obtain average 40% performance speedup comparing to the five-stage pipelined architecture.
2

Analysis and comparison of all-fiber 2 by 2 Couplers

Kuo, Chien-i 28 June 2006 (has links)
In this thesis, we have compared between dual-core fiber coupler with photonic crystal fiber coupler. From Surface Integral Equation Method derived from Maxwell¡¦s equations, we can simulate tapered fiber coupler, dual-core fiber coupler and photonic crystal fiber coupler. By analyzing the propagating characteristics and performance of these couplers, we hope to discuss between their advantages and dis-advantages. We have found that at the same parameters, conventional fiber coupler¡¦s coupling length is roughly half compared to photonic crystal coupler. In terms of bandwidth, photonic crystal coupler aided by air-hole tuning can achieve multiples times larger than conventional fiber coupler. So, we believe that in communication networks with a lust of bandwidth, photonic crystal coupler can definitely live up its expectations.
3

The City tourism industry organization design, operate and effect: Comparison of Kaohsiung City¡]1998-2005¡^ and Hong Kong¡]1997-2006¡^

Yen, Yun-lung 24 August 2009 (has links)
Over the past decade¡A Kaohsiung City Government showed immense concern about the development of tourism¡Aactive in the large-scale tourist activities, such as a Love- River Lantern Festival¡BWannian festival etc. According to the studies of the non-governmental tourism organizations, showed that those activities didn¡¦t attract the crowd in the proceeds. The major problems pointed to lack of a dedicated agency resources for the Tourism Bureau to integration in Kaohsiung City and also a long-term vision for the tourism policy. Tourist groups are asking for the establishment of the Kaohsiung City Government Tourism Bureau which may create a better tourism policy for the development. What are benefits of the tourism industry? World Travel & Tourism Council concluded three functions, including to the activating of industry's economy, the development of the tourism and the employment opportunities. Being the Asia¡¦s second-largest tourist attraction was the remarkable achievement of the Hong Kong tourism in 2004. Tourism revenues more than NT:360 billion, as well as a whole accounted for 12.4 percent of GDP for Hong Kong. Although Hong Kong is a habor city, it develops a large-scale tourism. Hong Kong Tourism Board , the establishment of a national-level institutions, promotes the tourist industry to the global. On the other hand, the Goverment established the Department of Tourism which is responsible for the internal integration of tourism resources. The government and quasi-government partnership model plays an important role in the Hong Kong¡¦s Tourism industry. The operation of The Dual Organizations has the advantiage of the tourism development. Tourism in Hong Kong made an example of success, It¡¦s fit for Kaohsiung City to study.
4

Estudo numÃrico do acoplador duplo simÃtrico de fibras Ãpticas operando com PPM e PAM para obtenÃÃo de portas lÃgicas / Numerical study of symmetrical double coupler for fiber optic operating with PPM and WFP to obtain gate

Alisson da ConceiÃÃo Ferreira 22 January 2008 (has links)
CoordenaÃÃo de AperfeiÃoamento de NÃvel Superior / Neste trabalho, foram investigadas as caracterÃsticas de operaÃÃo de um Acoplador Direcional NÃo-Linear(NLDC) Duplo SimÃtrico, trabalhando com pulsos de , em duas diferentes aplicaÃÃes: ObtenÃÃo de portas lÃgicas E e OU, sob ModulaÃÃo Por PosiÃÃo de Pulsos (PPM); obtenÃÃo de portas lÃgicas E e OU, sob ModulaÃÃo Por Amplitude de Pulsos (PAM). A investigaÃÃo à realizada, atravÃs de simulaÃÃes numÃricas, utilizando-se do mÃtodo de Runge Kutta de quarta ordem. Na primeira aplicaÃÃo, à analisada a possibilidade da realizaÃÃo de operaÃÃes lÃgicas pelo Acoplador Direcional NÃo-Linear (NLDC) Duplo SimÃtrico sem perda. Considerando a operaÃÃo das portas lÃgicas, foram utilizadas as quatro possÃveis combinaÃÃes para dois pulsos, nas fibras 1 e 2, modulados pela posiÃÃo temporal (PPM) nos nÃveis lÃgicos 0 ou 1. Foram investigados os efeitos de uma variaÃÃo no parÃmetro de ajuste da modulaÃÃo PPM, ou seja, no deslocamento inicial do pulso em relaÃÃo ao pulso referencial, ou informaÃÃo nÃo modulada, e na diferenÃa de fase entre os pulsos sÃlitons fundamentais de entrada devidamente modulados. Na segunda aplicaÃÃo, o NLDC duplo simÃtrico à submetido à modulaÃÃo PAM, utilizando-se tambÃm, das quatro combinaÃÃes possÃveis para os dois pulsos, nas fibras de entrada. Foram investigados os efeitos da variaÃÃo no parÃmetro de ajuste da modulaÃÃo PAM na amplitude inicial do pulso em relaÃÃo à amplitude de referÃncia, ou sinal sem modulaÃÃo, e tambÃm observada a amplitude de saÃda modulada versus uma diferenÃa de fase entre os pulsos sÃlitons fundamentais de entrada devidamente modulados. Nas duas aplicaÃÃes foram obtidas portas lÃgicas E e OU. / In this work, the performance study of a Symmetric Dual-Core Non-Linear Directional Coupler (NLDC), working with pulses of , in two different applications have been investigated: accomplishment of logical gates AND and OR, under Pulse Position Modulation (PPM); accomplishment of logical gates AND and OR, under Pulse Amplitude Modulation (PAM). The investigation is based in a numerical simulation study, using the fourth order Runge Kutta numerical method. In the first application, the possibility of the accomplishment of logical operations by Symmetric Dual-Core Non-Linear Directional Coupler (NLDC) without loss is analyzed. Considering the operation of the logical gates, the four possible combinations for two pulses, on the input fibers, modulated by the temporal PPM in the logical levels 0 or 1, were used. The effects of a variation in the coding parameter offset of the PPM modulation, that is, in the displacement of the input pulse relative to the reference time level, was investigated. In the second application, the symmetric dual-core NLDC is submitted to PAM modulation, using the four possible combinations for two pulses on the input fibers, were used, as well. The effects of a variation in the coding parameter offset of the PAM modulation relative to the reference amplitude, was investigated. The modulated output amplitude versus a phase difference between the input pulses , was also studied. On the two applications, logical gates AND and OR was observed.
5

未斷乳就哺乳?中國城市雙獨家庭研究 / Only children becoming parents: dual-core family in urban China

陳君碩 Unknown Date (has links)
中國為控制龐大的人口,自1979年開始實施計劃生育政策,一轉眼已經過了30年,一群1980年前後出生的獨生子女紛紛邁入婚姻、走入家庭,形成了獨生子女相互婚配的「獨生父母」,也同時造就了有別於傳統中國「發散型」家庭結構的「四二一家庭」。 本研究以此為出發,探究「四二一家庭」結構中的新型家庭關係,並挑戰結構功能論大師帕森斯關於現代化家庭之理論。本文認為,由於夫妻雙方皆為獨生子女,父母要協助子女分擔家務不再分身乏術,三代同堂的擴大家庭將成為中國城市的主要家庭模式,並非現代化理論所認為的核心家庭為主;而在四二一家庭中,親子關係也將居於核心地位,有別於帕森斯所認為的以夫妻軸為主。 筆者於2010年5月親赴北京對10位「獨生父母」進行訪談,深入了解獨生子女從擇偶、新婚、一直到四二一家庭成形所遇到的種種情況,包括夫妻家務分工上的不適應、為人父母後的角色轉換,以及在四二一家庭中獨一無二的天倫樂。 本文最後依據中國2010年第六次人口普查結果及獨生父母的訪談內容,結合各方專家意見,對計劃生育政策做出利弊分析,並探究生父母們在邁入家庭、準備「哺乳」的過程中,對父母的依賴,究竟「斷乳」了沒。 / Abstract In order to control the colossal population in China, the Chinese Communist Party have been implementing the birth control policy since 1979.Thirty years on, more and more children born under the one-child policy have arrived at nubile age. Marriage of only sons and only daughters compose the dual-core family which is different from the traditional Chinese family structure. This text focuses on the dual-core family, to explore the new family relationships and to challenge the Modernized theory of family proposed by T. Parsons. The text is of the opinion that the extended family model with three generations will become the main family structure in urban China as opposed to the nuclear family described in the Modernized theory; the focus of the family will be on the parent-child relationship rather than the conjugal relationship Parsons suggested. The author visited Beijing in May 2010 for interviews with ten “only-child parents”, This granted deeper understanding of the range of circumstances encountered during the process of partner selection, marriage and family formation by adult only-children. These include maladaptation in housework allocation, the role switch after becoming parents and the familial relationships and happiness unique to the extended family structure. In summation, the text combined findings from the sixth Chinese national census 2010, the conducted interviews and the opinions of various specialists and scholars to comment on the pros and cons of the birth control policy and to assess the level of parental dependence of adult only-children in China and their readiness for parenthood.
6

A Low Noise Digitally Controlled Oscillator for a Wi-Fi 6 All-Digital PLL / En Digitalt Styrd Oscillator med Lågt Fasbrus för en Heldigital Wi-Fi 6 PLL

Lundberg, Tommy January 2023 (has links)
Following the rise of Internet of Things (IoT), or just the technological advancements and expectations in a world where the things are or will be connected, new demands are put on Integrated Circuit (IC) for wireless connectivity. The use cases seem endless; smart home, healthcare, entertainment, and science are all areas that can benefit from connectivity of low power electronics. But there are obstacles to overcome. Meeting the specifications, especially the phase noise requirements of modern high-speed wireless standards can be a challenge for devices that run on low supply voltages and are allowed only very limited power consumption. The focus of this thesis is the exploration of modern LC-oscillator architectures for RF-transceivers, and the design and post-layout evaluation of a Digitally Controlled Oscillator (DCO) intended to be used in an All-Digital Phase Locked Loop (ADPLL) in a 22 nm FD-SOI process. The DCO specifications are set by an ADPLL for the Wi-Fi 6 (MCS 11) standard. The ADPLL is replacing the blocks that are usually implemented as noise-sensitive analog components with more robust digital blocks that are easier to integrate with baseband- and digital-circuitry. A dual-core class-C oscillator with a dynamic-biasing circuit is proposed and designed to meet the specification of -121 dBc/Hz phase noise at a 1 MHz offset from 7.8 GHz, a –7.18.6 GHz tuning range, and a frequency resolution of at most 35 kHz around 7.8 GHz. The phase noise specification is met; a phase noise of -121 dBc/Hz at the 1 MHz offset from 7.8 GHz is achieved in post-layout simulation along with a Figure of Merit (FoM) of 189.9, and an average tracking frequency step of 5.8 MHz. The tuning range specification was not met, but it is reasonable to believe that the specified range can be met after some redesign of the capacitor banks. Further work will be required. / Till följd av tillväxten inom Internet of Things (IoT), eller bara de teknologiska framgångar och förväntningar på en värld där dem flesta saker är eller kommer att bli uppkopplade, ställs nya krav på Integrated Circuit (IC)-komponenter för trådlös uppkoppling. Tillämningsområdena är oändliga; smart home, sjukvård och hälsa, underhållning och forskning är områden som som kan dra nytta av nya uppkopplingsmöjligheter med extremt strömsnål elektronik. Att leva upp till specifikationerna för moderna trådlösa höghastighetsuppkopplingar, speciellt när det kommer till fasbrus, kan dock vara en utmaning för enheter som måste klara sig med en väldigt begränsad effektåtgång. Fokus för denna avhandling är design och utvärdering på schematik och layout-nivå av en Digitally Controlled Oscillator (DCO) för en 22 nm Fully Depleted Silicon-On-Insulator (FD-SOI)-process avsedd att klara specifikationen satt av en given All-Digital Phase Locked Loop (ADPLL) för Wi-Fi 6 (MCS 11) standarden. En DCO och ADPLL ersätter block som tidigare tillämpats som analoga bruskänsliga komponenter med robustare digitala komponenter som är enklare att integrera med bas-band och digital logik-kretsar. En dubbelkärnig klass-C DCO med en dynamisk biaskrets föreslås för att nå kravet på fasbrus på maximalt -121 dBc/Hz mätt vid 1 MHz från en frekvens på 7.8 GHz, med ett frekvensomfång 7.1-8.6 GHz och en frekvensupplösning under 35 kHz. Fasbruset vid denna 1 MHz från 7.8 GHz uppmättes i simulering till -121 dBc/Hz, och en Figure of Merit (FoM) på 189.9 har uppnåtts, samt en genomsnittlig frekvensupplösning på 5.8 MHz nära 7.8 GHz. Designen klarar inte av att möta kraven på frekvensomfång, men det är sannolikt att en liknande design kan möta specifikationen efter ytterligare revision. Ytterligare arbete krävs.

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