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Dynamic Voltage Scaling (DVS) and Adaptive body bias (ABB) techniques respectively try to reduce the dynamic and static power components of an integrated circuit. Ideally, the two techniques can be combined to find the optimal operating voltages (VDD and VBB) to minimize power consumption. A combination of the DVS and ABB may warrant the circuit to operate at voltages (supply and body bias) different from the values specified by the two methods working independently. Also, this VDD and VBB values for minimal power consumption varies with the workload of the circuit. The workload can be used as an index to select the optimal VDD/VBB values to minimize the total power consumption. This paper examines the optimal voltages for minimal power operation for typical data path circuits like adders and multiply-accumulate (MAC) units across various process, voltage, and temperature conditions and under different workloads. In addition, a workload based look up table to minimize the power consumption is also proposed. Simulation results for an adder and a multiply-accumulate circuit block indicate a power saving of 12-30% over standard DVS scheme.

Emerging low power, embedded, wireless sensor devices are useful for wide range of applications, yet have very limited processing storage and especially energy resources. Sensor networks have a wide variety of applications in medical monitoring, environmental sensing and military surveillance. Due to the large number of sensor nodes that may be deployed and the required long system lifetimes, replacing the battery is not an option. Sensor systems must utilize the minimal possible energy while operating over a wide range of operating scenarios. The most of the efforts in the energy management in sensor networks have concentrated on minimizing energy consumption in the communication subsystem. Some researchers have also dealt with the issue of minimizing the energy in computing subsystem of a sensor network node. Some proposals using energy aware software have also been made. Relatively little work has been done on compiler controlled energy management in sensor networks. In this thesis, we present our investigations on how compiler techniques can be used to minimize CPU energy consumption in sensor network nodes. One effectively used energy management technique in general purpose processors, is dynamic voltage scaling. In this thesis we implement and evaluate a compiler assisted DVS algorithm and show its usefulness for a small sensor node processor. We were able to achieve an energy saving of 29% with a little performance slowdown. Scratchpad memories have been widely used for improving performance. In this thesis we show that if the scratchpad size for the system is chosen carefully, then large energy savings can be achieved by using a compiler assisted scratchpad allocation policy. With a small size of 512 byte scratchpad memory we were able to achieve 50% of energy savings. We also studied the behavior of dynamic voltage scaling in presence of scratchpad memory. Our results show that in presence of scratchpad memory less opportunities are found for applying dynamic voltage scaling techniques. The sensor network community lacks a comprehensive benchmark suite, for our study we also implemented a set of applications, representative of computational workload on sensor network nodes. The techniques studied in this thesis can easily be integrated with existing energy management techniques in sensor networks, yielding in additional energy savings.

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This term project deals with the problem of scheduling real-time tasks in overload conditions and techniques for lowering power consumption. Each of these parts features mechanisms and reasons for their using. There are also described specific algorithms, that are implemented, in operating system uC/OS-II, and compared in next phase of master's thesis.