Les composants électroniques embarqués dans des applications spatiales sont exposés à différents types de particules qui composent l’environnement radiatif spatial. L’interaction de ces particules avec les matériaux constituant les circuits intégrés est à l’origine d’effets singuliers ou d’effets de dose qui peuvent altérer la fiabilité des systèmes en induisant différents types de défaillances à l’échelle des fonctions électroniques élémentaires, et mettre en péril les missions satellitaires. En vue de prédire les taux d’évènement au cours d’une mission ou la durée de vie des composants en environnement radiatif, préalablement à leur intégration dans une application spatiale, il est nécessaire de comprendre les mécanismes physiques induits et de caractériser le fonctionnement des composants sous irradiation.Dans ce contexte, nous présentons l'élaboration et la mise en oeuvre de méthodes de caractérisation de la sensibilité des mémoires dynamiques SDRAM DDR3 aux effets des radiations en vue de leur future intégration dans des modules mémoires pour application spatiale. Le développement d’un banc de test fonctionnel et paramétrique compatible avec différents moyens d’irradiations est présenté. Les résultats d’essais obtenus sous rayonnement gamma, sont analysés et complétés par une estimation de la sensibilité des composants obtenue sous rayons X. Une campagne de caractérisation sous ions lourds, associée à l’utilisation d’un outil laser, permet de présenter une analyse comparative de la sensibilité des composants aux évènements singuliers. La complémentarité de ces techniques ainsi que les avantages et inconvénients des outils laser et rayons X sont discutés. / Electronic components, embedded in space applications, are exposed to different types of particles that make up the space radiation environment. The individual or cumulative interaction of these particles with the integrated circuits materials is the source of single-event effects or dose effects that can alter the reliability of the systems by inducing different types of failures at basic electronic functions level and threaten the mission success. In order to predict the event rate during a mission or the components lifetime in a radiative environment, prior to their integration into a space application, it is necessary to model these failures and to characterize the functioning of the components under irradiation.In this context, the objectives of this thesis are the development and implementation of models and methods for characterizing the sensitivity of DDR3 SDRAM memories to the radiation effects for their future integration into memory modules for space applications. The development of a functional and parametric test bench compatible with various irradiation facilities is presented. Results obtained under gamma radiation, are analyzed, and supplemented by sensitivity estimation using X-rays. A characterization campaign under heavy ions, combined with laser testing, allows us to present comparative analysis of the components SEE sensitivity. The complementarity of these

[pt] Neste trabalho a arquitetura de placas gráficas que usam a tecnologia de varredura (raster scan) é analisada. É discutido então o uso de memórias dinâmicas do tipo VRAM para lidar com o problema do gargalo dos acessos à memória de vídeo. São analisados então alguns módulos importantes que podem ser considerados opcionais numa placa de vídeo, uma vez que a escolha por estes módulos depende da aplicação específica da placa gráfica. Finalmente, apresentamos a descrição do projeto e implementação de uma placa gráfica utilizando o processador gráfico TMS34010 com capacidade para realizar aquisição de imagens. / [en] In the present work, we analyse the architecture of raster- scan graphic boards. We discuss then the use of VRAM dynamic memories to deal with the video memories bottleneck problem. We also analyse a few important modules that may be considered optionals, since the choice of using these modules depends upon the specific use the graphic board will be given. At last, we present the description of the project and implementation of a graphic board using the TMS34010 graphic processor with image acquisition capabilities.

This paper describes various approaches to hardware testing semiconductor memory. We describe the priciple of basic memory types, the way which each of them stores information and their comunication protocol. Following part deals with common failures which may occur in the memory.  The section also describes the implementation of memory model and tester designed in VHDL language. It is possible to inject some errors into memory, which are later detected by the tester. The final section shows the response of tester to various error types according to used error detection method. The paper is especially focused on failure detection by variants of march test.