The surge in transistor scaling and integration processes has driven the growth of wireless technology, especially low-cost millimeter-wave systems. Based on mainstream Silicon technology, System-on-Chip (SoC) has become an attractive approach to achieve the required high level of on-chip integration for modern wireless systems. However, the low resistivity (ρ=10 Ω-cm) and high relative permittivity (εr=11.9) of the silicon substrate are unsuitable for hosting antennas on it, because the Radio Frequency (RF) power is lost in the lossy silicon substrate, and some of it gets radiated in a certain undesired direction due to the surface waves. This has caused such antennas, typically known as Antenna-on-chip (AoC), to be poor radiators. Introducing an on-chip artificial magnetic conductor (AMC) between the substrate and the antenna can isolate the silicon substrate from the antenna and provide in-phase reflection, thereby improving the radiation performance. However, the drawback of conventional on- chip AMC is its relatively large thickness, which is extremely difficult to achieve on the thin silicon dioxide layer of typical CMOS processes (~10-15 μm). To resolve this problem, the embedded guiding structures have been designed between the periodic structure layer and the ground plane to realize an ultra-thin AMC which is suitable for thin oxide stack up of typical CMOS processes. Specifically, a patch-based AMC with embedded guiding structures has been designed for an on-chip monopole antenna operating at 94 GHz. The performance of the AMC has been studied for different resistivity substrates (from 10-3 to 103 Ω-cm). The AMC-backed on- chip antenna has been fabricated through an in-house CMOS-compatible process. The adhesion of the metallic layer to the substrate has been improved without using a seed layer, which is typically a low conductivity metal and has a negative impact on the radiation of the AoC. The measured input impedance and radiation performance of the AMC-backed AoC are fairly consistent with the simulations. It provides 5.85 dBi gain with the return loss of 16 dB at 94 GHz. According to the author’s best knowledge, this is the thinnest AMC-based AoC design in the literature.

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De nos jours, les systèmes embarqués temps-réels critiques intègrent de plus en plus de composants, et voient leur complexité augmenter. Les systèmes avioniques ont suivi cette évolution, voyant augmenter leurs processus de développement. Dès lors, les développeurs de plates-formes avioniques se sont tournés vers les méthodes de modélisation en avance de phase (i.e. en tout début de cycle de développement), afin d’anticiper les performances de celles-ci et aider à leur dimensionnement. Particulièrement, l’exploration de l’utilisation des ressources matérielles de la plate-forme par la partie applicative (l’ensemble des applications) est le point central de cette exploration des performances. Si les méthodes de modélisation actuelles offrent la possibilité de modéliser une plate-forme depuis les exigences jusqu’au niveau architectural, elles ne sont pas encore adaptées à la modélisation comportementale. Elles ne permettent donc pas l’étude du comportement et la comparaison de différentes architectures d’une plate-forme en avance de phase. Mes travaux de thèse ont pour but d’offrir un processus de modélisation et simulation de plate-forme avionique répondant à cette problématique. L’objectif est de compléter les méthodes de modélisation actuelles pour apporter une analyse plus fine des performances d’une plate-forme en avance de phase, et les comparer avec les exigences. Pour cela, nous proposons une approche en quatre étapes : i) une étape de modélisation des applications et d’extraction des stimuli applicatifs ; ii) une étape de modélisation architecturale du système basée sur AADL (Architecture Analysis and Design Language) et son annexe ARINC653 ; iii) une étape de génération d’un modèle comportemental de la partie matérielle et intergicielle du système en SystemC-TLM ; iv) une étape de simulation et d’analyses, où les stimuli applicatifs sont exécutés par le modèle comportemental, et les performances extraites comparées aux exigences système. Enfin, nous avons validé notre méthode sur un cas d’étude avionique que nous présenterons également. / Nowadays, real-time critical embedded systems are more and more complex due to an increase of the integrated components. Following that trend, avionic systems development complexity increases too. So early modeling processes are more and more used in order to anticipate on plat-forms performance and help sizing them. Particularly, hardware resources usage exploration is a key aspect for performance exploration. Current processes allow to model avionic platform from requirements to architectural level of abstraction, but they do not allow to model a behavioral avionic platform. Thus, they do not allow to explore the hardware resources usage of the platform, neither to compare some alternatives of architectures at early phase of development cycle. My PhD work presents our avionic platform modeling and simulation process that answer that problem. The goal is to complete current modeling processes to offer more accurate early performance analysis, and compare them with the system requirements. For that, we propose a for steps method : i) an application modeling and stimuli extraction step ; ii) an architectural modeling step, based on the AADL (Architecture Analysis and Design Language) and its ARINC653 annex ; iii) a behavioral execution platform model (hardware and middleware) generation step with SystemC-TLM ; iv) a simulation and analysis step, when performance are compared with system requirements. At last, we will present our validation part on an avionic case study.

A convolutional neural network (CNN) is a deep learning framework that is widely used in computer vision. A CNN extracts important features of input images by perform- ing convolution and reduces the parameters in the network by applying pooling operation. CNNs are usually implemented with programming languages and run on central process- ing units (CPUs) and graphics processing units (GPUs). However in recent years, research has been conducted to implement CNNs on field-programmable gate array (FPGA). The objective of this thesis is to implement a CNN on an FPGA with few hardware resources and low power consumption. The CNN we implement is for digits recognition. The input of this CNN is an image of a single digit. The CNN makes inference on what number it is on that image. The performance and power consumption of the FPGA is compared with that of a CPU and a GPU. The results show that our FPGA implementation has better performance than the CPU and the GPU, with respect to runtime, power consumption, and power efficiency.

How can Linux reduce the time required for development in embedded systems, and what makes Linux appealing to embedded developers despite the loss in overall control? Through qualitative interviews with industry professionals and a systematic literature review, challenges and benefits of using Linux in embedded systems development were identified and discussed. Three hypotheses were formulated based on recurring topic agreement among the interview subjects: Reduced development time through the use of open-source solutions, struggles with real-time and security requirements, and challenges within troubleshooting and dependency management. The empirical data observed primarily aligned with the professional perception indicating the potential for development time reduction leveraging resources properly. However also highlighting additional challenges that are not present in traditional embedded system development. Several trade-offs were observed from the findings, including increased overhead and licensing concerns. Further research is required to fully understand the advantages, challenges and limits associated with Linux in an embedded system environment. This study provides valuable insights for future exploration within the field.

The introduction of smart grid technology has changed the way traditional power grid network function. It made the grid structure more dynamic by enhancing electrical usage management capability. Also, it has increased the scope to enhance communication infrastructure in a smart grid structure. The current smart grid solution is based on IEC 61850 architecture where the exchange of information between the electrical utilities is over the fast Ethernet LAN connection. This communication mechanism is fast, efficient but lacks scalability, flexibility and less susceptible to failure. Also, earlier technical paper from IEC 61850 standard was for communication within a substation. Wide Area Monitoring Protection and Control implementation which utilizes coherent real time synchrophasor information would play a vital role in realizing the utility physical status. IEC 61850-90-5, a new technical report from International Electrotechnical Commission provides the mechanism to transmit and receive the synchrophasor information using the advance IP protocol over a wireless communication infrastructure for WAMPAC application. IEC 61850-90-5 provide a way to exchange routable synchrophasor information over public IP network such as LTE, WiMax, WLAN, etc. Out of all the available wireless solution, LTE provides high flexibility, distance coverage, data rate with low latency and hence can play an important role in replacing the existing communication structure in a smart grid. The thesis work evaluates the performance and applicability of LTE for smart grid communication. An IEC 61850-90-5 communication model utilizing UDP/IP protocol to transmit and receive data over the LTE network was developed from the open source project. The modified model was used to benchmark the performance of LTE. Different communication metrics such as reliability, availability, latency, and throughput was evaluated to benchmark the performance of LTE for time critical smart grid application. The metrics were measured for different packet sizes and transmission rates combination. The result shares some interesting findings on the readiness of LTE for smart grid solution. It is concluded that cellular network can play an important role in realizing communication infrastructure in a smart grid application.

Controller Area Network (CAN) is a communication bus designed in the 90s to make simple androbust in-vehicle networks. However, as vehicles are becoming more complex, higher performanceCAN protocols were introduced to manage the expanding volumes of real-time data and more strictsafety requirements. This resulted in the development of next-generation CAN protocols, i.e. CANwith Flexible Data rate (CAN FD) and CAN Extra Long (CAN XL). Response-Time Analysis(RTA) of CAN was developed as a tool to verify if all messages on the CAN bus meet their timingrequirements, i.e. meet their deadlines. Existing RTA is revisited and its applicability on CAN XLmessages is analyzed in the thesis. RTA with priority-based queueing policy, but also RTA whichconsiders different buffer limitations is also revisited. This thesis developed an analytical modelfor Worst-Case Transmission Time (WCTT) calculations for CAN XL which is a prerequisite forits RTA. Finally, MPS-CAN Analyzer and industrial tool suit Rubus-ICE are extended to supportRTA of both CAN FD and CAN XL. The extended tools were used to implement two use casesconsisting of the number of CAN, CAN FD and CAN XL messages. Several experiments wereconducted to compare the performance of different CAN generations in terms of response times ofthe messages. The results indicate that larger data payloads should be sent using next-generationCAN protocol with their bit-rate switching option enabled. Nodes implementing abortable and nonabortablebuffers were also analyzed in the two experiments. Small differences in the response timesof the messages were noticed when buffer limitations are considered.

Energy systems need to evolve to meet the requirements of the modern world and the future. Hence, substantial effort is needed at an academic and industrial level to develop valuable diagnostic techniques. One current limitation of developing these diagnostic techniques is a lack of data on significant changes in the power signal (voltage and current). Producing sufficient data would require the deployment of data acquisition units that can record events of interest. These data acquisition units could be embedded systems deployed in the field. One way to detect changes in the signal is via a waveform prediction algorithm. Hence, waveform prediction will play a significant role in developing the trigger mechanism for monitoring algorithms as predicting a waveform a few cycles ahead allow the triggering of desired events. This thesis aims to find suitable machine-learning models for online and real-time time series prediction that predict the nominal state of a power signal waveform and could be used to detect significant events to activate a trigger mechanism in data acquisition devices. In this thesis, three different machine-learning models: Accurate Online Support Vector Regression (AOSVR), online Autoregressive Integrated Moving Average (ARIMA), and online Gated Recurrent Units (GRU) are implemented on a Raspberry Pi 3B+ and compared to each other in the aspects of computation time and error. Rigorous testing results demonstrate that the AOSVR had the lowest average operation in all the tested sampling rates, while the ARIMA had the overall lowest prediction time and lowest error when tested on data with sampling rates up to 2.5 kHz. Furthermore, all the models were able to produce a trigger at significant events. The results of this thesis could be used by the industry to further the development of diagnostic techniques, as well as increase the general knowledge of machine-learning applications on embedded systems.

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In this work, two MPPT algorithms have been implemented and evaluated in an existing solar charger from the company Solar Bora. This with the aim of evaluating which algorithm performs best in terms of power production and stability in the system in question. Another goal in this work was to develop the solar cell charger with support for several input channels to be able to connect several solar cell panels. This with the aim of giving more redundancy to the system and further increasing power production. The challenge that arose regarding multiple channels was about how the channels would be balanced among themselves in a stable way. As a minor part of this work, it was also included to evaluate whether a minor hardware optimization was possible. The purpose of this was also to increase power production. The result of this work regarding how the MPPT algorithms perform is in line with the theory presented in the theory part. / I detta arbete har två MPPT-algoritmer implementerats och utvärderats i en befintlig solcellsladdare från företaget Solar Bora. Detta med syfte att utvärdera vilken algoritm som presterar bäst i form av effektproduktion och stabilitet i systemet i fråga. Ytterligare ett mål i detta arbete var att utveckla solcellsladdaren med stöd för flera in-kanaler för att kunna ansluta flera solcellspaneler. Detta med syfte att ge mera redundans till systemet samt öka effektproduktionen ytterligare. Utmaningen som uppstod gällande multipla kanaler handlade om hur kanalerna skulle balanseras sinsemellan på ett stabilt sätt. Som en mindre deluppgift i detta arbete ingick även att utvärdera huruvida en mindre hårdvaruoptimering var möjlig. Syftet med denna var också att öka effektproduktionen. Resultatet i detta arbete gällande hur MPPT-algoritmerna presterar stämmer överens med den teori som presenteras i teoridelen.