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Traffic characteristics on the Jeddah-Makkah freeway, Saudi ArabiaOsra, Khalid A. January 2002 (has links)
Thesis (M.S.)--Ohio University, 2002. / Title from PDF t.p.
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Effect of horizontal alignment on driver speed behaviour on different road classifications /Nie, Bin. January 1900 (has links)
Thesis (M.App.Sc.) - Carleton University, 2006. / Includes bibliographical references (p. 144-152). Also available in electronic format on the Internet.
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Managed lanes weaving and access guidelinesYang, Chulsu. January 2009 (has links)
Thesis (Ph.D.)--University of Texas at Arlington, 2009.
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Increasing freeway merge capacity through on-ramp metering /Rudjanakanoknad, Jittichai. January 1900 (has links) (PDF)
Thesis (Ph. D. in Engineering)--University of California, Berkeley, 2005. / "May 2005." Includes bibliographical references (p. 64-66). Also available online via the ITS Berkeley web site (www.its.berkeley.edu).
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A review of the capacity of the Highways Department to implement highway infrastructure projects in 1990's /Chan, Fuk-yiu, Victor. January 2002 (has links)
Thesis (M.P.A)--University of Hong Kong, 2002. / Includes bibliographical references.
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A review of the capacity of the Highways Department to implement highway infrastructure projects in 1990'sChan, Fuk-yiu, Victor. January 2002 (has links)
Thesis (M.P.A)--University of Hong Kong, 2002. / Includes bibliographical references. Also available in print.
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Freeway crash prediction models for long-range urban transportation planning /Kiattikomol, Vasin. January 2005 (has links) (PDF)
Thesis (Ph. D.) -- University of Tennessee, Knoxville, 2005. / Cover title. Computer-produced typeface. "August 2005." Includes bibliographical references (p. 120-125). Also available online via the University of Texas Electronic Thesis/Dissertation Website (http://etd.utk.edu/).
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Les impacts du Métrobus de Québec la question du report modal /Bourel, Céline. January 1900 (has links) (PDF)
Thèse (M.ATDR)--Université Laval, 2005. / Titre de l'écran-titre (visionné le 12 juillet 2005). Bibliogr.
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Understanding and mitigating capacity reductions at freeway bottlenecksChung, Koo Hong. January 2004 (has links)
Thesis (Ph. D.)-- University of California, Berkeley, 2004. / Includes bibliographical references (leaves 46-47). Also available online via the University of California eLibrary website (http://repositories.cdlib.org/).
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PCI Express-based Ethernet SwitchJanuary 2012 (has links)
abstract: A new type of Ethernet switch based on the PCI Express switching fabric is being presented. The switch leverages PCI Express peer-to-peer communication protocol to implement high performance Ethernet packet switching. The advantages and challenges of using the PCI Express as the switching fabric are addressed. The PCI Express is a high-speed short-distance communication protocol largely used in motherboard-level interconnects. The total bandwidth of a PCI Express 3.0 link can reach as high as 256 gigabit per second (Gb/s) per 16 lanes. Concerns for PCI Express such as buffer speed, address mapping, Quality of Service and power consumption need to be considered. An overview of the proposed Ethernet switch architecture is presented. The switch consists of a PCI Express switching fabric and multiple adaptor cards. The thesis reviews the peer-to-peer (P2P) communication protocol used in the switching fabric. The thesis also discusses the packet routing procedure in P2P protocol in detail. The Ethernet switch utilizes a portion of the Quality of Service provided with PCI Express to ensure guaranteed transmission. The thesis presents a method of adapting Ethernet packets over the PCI Express transaction layer packets. The adaptor card is divided into the following two parts: receive path and transmit path. The commercial off-the-shelf Media Access Control (MAC) core and PCI Express endpoint core are used in the adaptor. The output address lookup logic block is responsible for converting Ethernet MAC addresses to PCI Express port addresses. Different methods of providing Quality of Service in the adaptor card include classification, flow control, and error detection with the cooperation of the PCI Express switch are discussed. The adaptor logic is implemented in Verilog hardware description language. Functional simulation is conducted in ModelSim. The simulation results show that the Ethernet packets are able to be converted to the corresponding PCI Express transaction layer packets based on their destination MAC addresses. The transaction layer packets are then converted back to Ethernet packets. A functionally correct FPGA logic of the adaptor card is ready for implementation on real FPGA development board. / Dissertation/Thesis / M.S. Electrical Engineering 2012
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