PROGRAMMABLE DECIMATOR FOR SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER: In this work a programmable decimator design has been presented in 1.5 μm n-well CMOS process for integration with an existing modulator to form a sigma-delta analog-to-digital converter (ADC). The decimator is implemented using a second order Cascaded Integrator Comb (CIC) filter and can be programmed to work with two different oversampling ratios of 64 and 16. The input to the decimator is provided from a first order modulator. With oversampling ratios of 64 and 16, an output resolution of 10-bit and 7-bit, respectively are achieved for the ADC. The ADC can be operated with an oversampling clock frequency of up to 8 MHz and with an input signal bandwidth of up to 65 KHz. An in-built clock divider circuit has been designed which generates two output clocks whose frequencies are equal to the input clock frequency divided by the oversampling ratios 64 and 16. CHARGE PUMP CIRCUITS: The charge pump CMOS circuits are presented which are designed based on a new technique of internal clock voltage boosting. Four and six-stage charge pumps are implemented in 1.5 μm n-well CMOS process. The charge pump circuits can be operated in 1.2 V - 3 V power supply voltage range. Outputs of 12.5 V and 17.8 V are measured from four and six-stage charge pumps, respectively with a 3 V power supply. The charge pump circuits can also be used to generate clock voltages higher than the input clock voltage. In the present design, clock voltages of 8 V and 11 V have been generated from four-stage and six-stage charge pumps, respectively which are nearly 2.5 and 4 times the input clock voltage of 3 V. The technique of boosting the clock internally has been applied in implementation of a revised version of battery powered Bio-implantable Electrical Stimulation System (BESS) integrated circuit.

Laterally Movable Gate Field Effect Transistor (LMGFET) invented at LSU as a microactuator is the subject of study in this research. The gate moving in lateral direction in a LMGFET changes channel width but keeps the channel length and the gap between the metal gate and the gate oxide constant. LMGFET offers linear change in drain current with gate motion and a large displacement range. This research is the first demonstration of LMGFET. In this dissertation, a post-IC LIGA-like process for LMGFET microstructure fabrication has been developed that is compatible with monolithic integration with CMOS circuitry. A two-mask post-IC process has been developed in this research for LMGFET fabrication. This novel process utilizes S1813 photoresist as a sacrificial layer in conjunction with a thicker resist like AZ P4620 or SU-8 as an electroplating mold. New curing temperatures for the sacrificial layer photoresist have been determined for this purpose. LMGFET microstructures have been successfully integrated with CMOS circuitry on the same chip to form integrated microsystem. LMGFET microstructure driven by a comb-drive with serpentine retaining spring shows sensitivities Sel of 2 and 1.43 nA/V respectively at 5 and 25 Hz. These numbers reflect that LMGFET is capable of measuring nm range displacement. Electrical characteristics of a depletion type LMGFET structure are measured and show an average sensitivity Sl of - 4 µA/µm at drain to source voltage VDS of 10 V with the gate shorted to source. Several applications of microsystems utilizing LMGFET microstructures as a position sensor or an accelerometer, a spectrum analyzer or an electro-mechanical filter and a mechanical/optical switch are described.

Organic thin film transistors have the potential to replace silicon based transistors in applications such as smart cards and RF-ID due to their low cost and low processing temperatures. Thermally evaporated pentacene is studied as an organic thin film material. Thin film transistors were fabricated in bottom contact structure using thermal evaporation of pentacene at a rate of 0.5 to 1 nm/s. Heavily doped Si was used as a gate material and 100 nm thick silicon dioxide was used as a dielectric. Ni was used as contact metal for source and drain contacts. Threshold voltage of 16 V and mobility of 0.0016 cm2/V-s were obtained. Grain size in pentacene films increased from 120 nm to 150 nm upon annealing at 200 ◦C for 30 min. in nitrogen ambient. Resistivity of the pentacene films decreased with annealing temperature indicating an activation energy of 0.22 eV. Hybrid Integration of a Bio-implantable Electrical Stimulation System (BESS) is carried out in the second part of this work. BESS produces periodic pulses that stimulate the gastric muscles. BESS consists of an application specific integrated circuit powered by rechargeable batteries, which are charged by a remote power delivery system. Screen printing technique was used for BESS hybrid integration. The same can be extended in future for fabricating organic transistors. The optimum screen printing process determined included squeegee speed of 2.2 cm/s, off-contact height of 2 mm and squeegee pressure of 80 PSI for ED3000 ink used. Ceramic, silicon, glass, polyimide and kapton substrates have been utilized for printing. Interconnect pattern of area 1 × 0.75 was screen printed on a ceramic substrate using ED3000 silver conductive ink and surface mount components were mounted. Bio-compatible 100 µm thick polyimide substrates were prepared by spin coating pyralin at 750 RPM and baked at 350 ◦C for 30 min. ED3000 conductive ink was used to print electrodes on polyimide substrates. The BESS system is now ready for full hybrid integration and testing.

Optical burst switching (OBS) is a technology positioned between wavelength routing and optical packet switching that does not require optical buffering or packet-level parsing, and it is more efficient than circuit switching when the sustained traffic volume does not consume a full wavelength. However, several critical issues still need to be solved such as contention resolution without optical buffering which is a key determinant of packet-loss with a significant impact on network performance. Deflection routing is an approach for resolving contention by routing a contending packet to an output port other than the intended output port. In OBS networks, when contention between two bursts cannot be resolved through deflection routing, one of the bursts will be dropped. However, this scheme doesn’t take advantage of all the available resources in resolving contentions. Due to this, the performance of existing deflection routing scheme is not satisfactory. In this thesis, we propose and evaluate three new strategies which aim at resolving contention. We propose a new approach called Backtrack on Deflection Failure, which provides a second chance to blocked bursts when deflection failure occurs. The bursts in this scheme, when blocked, will get an opportunity to backtrack to the previous node and may get routed through any deflection route available at the previous node. Two variants are proposed for handling the backtracking delay involved in this scheme namely: (a) Increase in Initial Offset and (b) Open-Loop Reservation. Furthermore, we propose a third scheme called Bidirectional Reservation on Burst Drop in which bandwidth reservation is made in both the forward and the backward directions simultaneously. This scheme comes into effect only when control bursts get dropped due to bandwidth unavailability. The retransmitted control bursts will have larger offset value and because of this, they will have lower blocking probability than the original bursts. The performance of our schemes and of those proposed in the literature is studied through simulation. The parameters considered in evaluating these schemes are blocking probability, average throughput, and overall link utilization. The results obtained show that our schemes perform significantly better than their standard counterparts.

Bio-implantable devices such as heart pacers, gastric pacers and drug-delivery systems require power for carrying out their intended functions. These devices are usually powered through a battery implanted with the system or are wired to an external power source. In this work, a remote power delivery system (RPDS) is considered as a means to charge rechargeable batteries that power a Bio-implanted Electrical Stimulation System (BESS). A loosely coupled inductive power transmitter and receiver system has been designed to recharge batteries for a bio-implanted gastric pacer. The transmitter coil is periodically worn around the waist. The receiver coil, rechargeable batteries, battery-charging chip and the chip containing electrical stimulation circuitry form a bio-implanted hybrid integrated microsystem. The link efficiency between a transmitter coil and the implanted receiver coil when the diameters are markedly different is analyzed. A design methodology for RPDS is proposed based on the load and voltage required at the load. An analytical model is developed with the help of simple Matlab coding. A full wave rectifier with a voltage doubler circuit is used for the conversion of ac voltage to the required dc voltage. This dc voltage supplies power to a battery charging chip which is used to safely and appropriately charge a rechargeable Li-ion battery. For an input supply voltage of 17.67 V rms, operating frequency of 20 kHz and radial coplanar displacement between the coil axes of 7.5 inches, the maximum dc voltage and power obtained across a 65Ω load resistor are 9.65 V and 1.33 W respectively. For a radial coplanar displacement between the coil axes of 6 inches, a 3.7 V nominal, 150 mAh polymer lithium ion battery has been successfully charged in 1 hour and 40 minutes from an initial voltage of 3.39 V to 4.12 V with an input voltage of 19.81 V rms at 20 kHz. An attempt has been made to model coil parasitics at high frequency. Variations in the load power as a function of frequency and radial coplanar displacement of the axes are examined. Design strategies to optimize power delivery with given geometric constraints are considered.

Use of low relative dielectric constant (low-k) material as an interlayer dielectric is among important approaches to reduce the RC time delay in high performance ultra-large-scale integrated circuits. Copper metallization is another approach besides the use of low-k material, in reducing the RC delay time, because of its well-known characteristics of low resistivity and high electromigration resistance. Fluorocarbon films containing silicon (SiCF) have been developed in this work for low-k interlayer dielectric applications below 50 nm linewidth technology. The films were prepared by plasma enhanced chemical vapor deposition (PECVD) using gas precursors of tetrafluoromethane as the source of active species and disilane (5 % by volume in helium) as both an active species source and a reducing agent to control the ratio of fluorine to carbon in the films. The basic properties for these low-k interlayer dielectric films were studied along with characterization of their fabrication process. Electrical, mechanical, chemical and thermal properties were evaluated including dielectric constant, electrical field strength, surface planarity, residual stress, hardness, chemical bond structure, and shrinkage upon heat treatment. Deposition process conditions were optimized for film thermal stability while maintaining a relative dielectric constant value as low as 2.0. The average breakdown field strength of the SiCF films was 4.74 MV/cm and its optical energy gap was in the range of 2.2 to 2.4 eV. The hardness and residual stress in the SiCF films deposited under the optimized conditions were respectively measured to be in the range of 1.4 to 1.78 GPa and in the range of 11.6 to 23.2 MPa of compressive stress. For integrated microsystems as well as for ULSI circuits, surface modification of SiCF films by wet chemical treatment and by X-ray irradiation were examined to facilitate copper metallization. Feasibility of copper deposition by recently developed electroless techniques is discussed in conjunction with the studies utilizing wet chemical modification of the film surface. The effect of X-ray irradiation on the chemical structure of the films is also discussed. Additionally, means for selective surface modification of the films are introduced by exposing the films through an X-ray mask.

Defense against Distributed Denial of Service (DDoS) attacks is one of the primary concerns on the Internet today. DDoS attacks are difficult to prevent because of the open, interconnected nature of the Internet and its underlying protocols, which can be used in several ways to deny service. Attackers hide their identity by using third parties such as private chat channels on IRC (Internet Relay Chat). They also insert false return IP address, spoofing, in a packet which makes it difficult for the victim to determine the packet's origin. We propose three novel and realistic traceback mechanisms which offer many advantages over the existing schemes. All the three schemes take advantage of the Autonomous System topology and consider the fact that the attacker's packets may traverse through a number of domains under different administrative control. Most of the traceback mechanisms make wrong assumptions that the network details of a company under an administrative control are disclosed to the public. For security reasons, this is not the case most of the times. The proposed schemes overcome this drawback by considering reconstruction at the inter and intra AS levels. Hierarchical Internet Traceback (HIT) and Simple Traceback Mechanism (STM) trace back to an attacker in two phases. In the first phase the attack originating Autonomous System is identified while in the second phase the attacker within an AS is identified. Both the schemes, HIT and STM, allow the victim to trace back to the attackers in a few seconds. Their computational overhead is very low and they scale to large distributed attacks with thousands of attackers. Fast Autonomous System Traceback allows complete attack path reconstruction with few packets. We use traceroute maps of real Internet topologies CAIDA's skitter to simulate DDoS attacks and validate our design.

In this thesis, we use log-polar transform to solve object tracking. Object tracking in video sequences is a fundamental problem in computer vision. Even though object tracking is being studied extensively, still some challenges need to be addressed, such as appearance variations, large scale and rotation variations, and occlusion. We implemented a novel tracking algorithm which works robustly in the presence of large scale changes, rotation, occlusion, illumination changes, perspective transformations and some appearance changes. Log-polar transformation is used to achieve robustness to scale and rotation. Our object tracking approach is based on template matching technique. Template matching is based on extracting an example image, template, of an object in first frame, and then finding the region which best suites this template in the subsequent frames. In template matching, we implemented a fixed template algorithm and a template update algorithm. In the fixed template algorithm we use same template for the entire image sequence, where as in the template update algorithm the template is updated according to the changes in object image. The fixed template algorithm is faster; the template update algorithm is more robust to appearance changes in the object being tracked. The proposed object tracking is highly robust to scale, rotation, illumination changes and occlusion with good implementation speed.

An in-house processing capability is developed in this research for silicon-glass bonding for microfabrication and wafer level chip scale packaging (WLCSP) using a wafer bonder. New masking technology for wet etching of glass to a depth of more than 430 µm is reported in this research work along with development of an anodic bonding process that permits electrical feedthroughs for connections to outside world. Three novel masks were developed in this work for deep wet etching of glass. They were multilayers of metals Mo/Cr/Au (mask 1) and Cr/Au/electroplated Ni (mask 2) both in combination with 20 µm thick AZ® P4620 photoresist and anodically bonded silicon (mask 3). Etch depths greater than 600 µm in glass has been achieved using anodically bonded silicon mask 3 above. It may be currently the only method available to achieve etch depths of 1 mm in glass. Earlier barrier of 300 µm etch depth in glass using multilayer metal mask has effectively been broken in this work with an etch depth of 430 µm achieved using electroplated Ni mask 2) above. A high value of 0.88 for the aspect ratio, defined as the ratio of the vertical etch depth to the lateral etch distance, was achieved using mask 1) above. The problem of etched surface roughness observed in glass with undiluted HF etching has been alleviated by use of a combination of 50:5:1 by volume HF:HCl:HNO3. Etch depths of 355 µm has been achieved in silicon using 45 % KOH solution at 50 °C with 1 µm thick oxide mask. The above etch parameters also resulted in smooth etched mirror like surfaces, sharp edges in etched pits and deep trenches in silicon. The decontaminated etched glass and silicon substrates were aligned in-situ and bonded using an AML 402 wafer bonder. The corner areas of the glass wafer were diced to expose the metal lines permitting electrical communication from the anodically bonded packaged chip to the outside world. The concept of WLCSP using anodic bonding has been developed and demonstrated in this research.

Carbon nanotubes (CNT) have emerged to be one of the most versatile of materials ever discovered. The small dimensions, high electrical conductivity and strength along with other physical and electrical properties make them a unique material with a wide range of promising applications. One such use is that of CNTs as electron beam sources. A typical CNT has a diameter of only a few nanometers but can be hundreds of microns long. Applying a voltage across the length of such an object results in field emission of electrons from one end of the tube. This effect is due to intense electric field enhancement that occurs at the ultra sharp tip of the nanotube. A viable field emission electron beam source can be fabricated from CNTs. The primary goal of this work is to study the effects of various factors that influence field emission from multiwalled CNTs. For the set of factors that was chosen for investigation, a suitable field emission testing system was designed and assembled. Temperature of the CNTs was observed to have a considerable effect on the field emission from CNTs. Current saturation is observed at high temperatures. These findings can prove to be critical if the field emission device is operating in conditions of high temperature. The effects of variation in ambient pressure and changes in the background gas species are also studied. The field emission device characteristic is found to be very sensitive to the ambient gas pressure and more so when the gas species used was helium. Among Ar, He and N2, it is observed that He is the most suitable for field emission based device applications. It has been experimentally proven that aligned CNTs are far superior to random CNTs in terms of field emission characteristics. Effect of different substrate materials on field emission has also been examined. It has been found that metallic substrates like stainless steel show promise of better performance. CNT growth conditions have also been shown to influence their field emission property. Youngs interference fringes found on the copper anode surface after field emission have been reported here. Emitter and anode degradation as a result of field emission have been discussed as part of this wok. However it is important to note that CNTs are relatively more robust and less prone to degradation when compared to many other conventional field emitters. These results can be applied to find a set of optimal parameters that could be used for any field emission device design in order to get maximum field emitted current density at low operating voltages.