Introduction Electromyography (EMG) is a technique used to study the activity of muscle through detection and analysis of the electrical signals generated during muscular contractions. Electromyographic activity is recorded from skeletal muscles to obtain information about their anatomy and physiology. Electromyography, in interplay with various anatomical techniques, provides the present knowledge of the structural organization and the nervous control of muscle. EMG is the prime source of information about the status of the neuromuscular system, and EMG has developed into a diagnostic tool that allows the clinician to follow changes in nerve and muscle caused by neuromuscular diseases. EMG provides both invasive and noninvasive means for the study of muscular functions [1, 2]. It is also useful in interpreting pathologic states of musculoskeletal or neuromuscular systems [3, 4]. In particular, EMG offers valuable information concerning the timing of muscular activity and its relative intensity [5, 6]. Standard EMG is typically recorded from fine wire or two surface electrodes placed at discrete sites over a muscle or muscle belly. Currently surface grid electrode EMG is widely used. The cell bodies of these neurons reside in the brainstem and spinal cord. The interfacing fiber between motor neuron and muscle is called axon. At the distal end, an axon divides 1 into many terminal branches. Each terminal branch innervates a group of muscle fibers. When a nerve signal approaches the end of an axon, it spreads out over all its terminal branches and stimulates all the muscle fibers supplied by them. So, all the excited muscle fibers contract almost simultaneously. Since they behave as a single functional unit, one nerve fiber and all the muscle fibers innervated by it are called a motor unit (MU) [7, 8]. Generally, the muscle fibers of a motor unit are distributed throughout muscle rather than being clustered together. The fine control of the muscle force is performed through the intricate mechanism and interaction of the brain and muscle. During contraction, these motor units are recruited systematically and the recruited motor units discharge in a train of pulses in a complex manner [9, 10]. The recorded EMG is the temporal summation of all the recruited motor unit action potential trains. Because movement is controlled by motor unit activity, an understanding of motor unit physiology can have a significant impact on the evaluation and treatment of movement disorders. The neuromuscular system is an intricate physiological organization of brain, nerve and muscle. These neural control properties are not well understood mostly because of the experimental difficulties in quantifying the neural input to the muscle. Moreover, the muscle itself is a complex system. It is necessary to address these complexities as accurately as possible. Understanding of these complex systems facilitates the understanding of EMG generation, which is a highly complex signal by itself.

DC-DC converter is one of the mostly used power electronic circuits, and it has applications in various areas ranging from portable devices to aircraft power system. Various topologies of dc-dc converters are suitable for different applications. In high power applications such as the bi-directional dc-dc converter for dual bus system in new generation automobiles, several topologies can be considered as a potential candidate. Regardless of the topology used for this application, the reliability of the converter can be greatly enhanced by introducing redundancy of some degree into the system. Using redundancy, uninterrupted operation of the circuit may be ensured when a fault has occurred. The redundancy feature can be obtained by paralleling multiple converters or using a single modular circuit that can achieve this attribute. Thus, a modular dc-dc converter with redundancy is expected to increase the reliability and reduce the system cost. Recently, the advancement in power electronics research has extended its applications in hybrid electric automobiles. Several key requirements of this application are reliable, robust, and high efficiency operation at low cost. In general, the efficiency and reliability of a power electronic circuit greatly depend on the kind of circuit topology used in any application. This is one of the biggest motivations for the researchers to invent new power electronic circuit topologies that will have significant impact in future automobile industry. This dissertation reviews existing modularity in power electronic circuits, and presents a new modular capacitor clamped dc-dc converter design that has many potential uses in future automotive power system. This converter has multilevel operation, and it is capable of handling bi-directional power. Moreover, the modular nature of the converter can achieve redundancy in the system, and thereby, the reliability can be enhanced to a great extent. The circuit has a high operating efficiency (>95%), and it is possible to integrate multiple voltage sources and loads at the same time. Thus, the converter could be considered as a combination of a power electronic converter and a power management system. In addition to the new dc-dc converter topology, a new pair of modular blocks defined as switching cells is presented in this dissertation. This pair of switching cells can be used to analyze many power electronic circuits, and some new designs can be formed using those switching cells in various combinations. Using these switching cells, many power electronic circuits can be made modular, and the modeling and analysis become easier.

Power budget is very critical in the design of battery-powered implantable biomedical instruments. High speed, high resolution and low power usually cannot be achieved at the same time. Therefore, a tradeoff must be made to compromise every aspect of those features. As the main component of the bioinstrument, high conversion rate, high resolution ADC consumes most of the power. Fortunately, based on the operation modes of the bioinstrument, a reconfigurable ADC can be used to solve this problem. The reconfigurable ADC will operate at 10-bit 40 MSPS for the diagnosis mode and at 8-bit 2.5 MSPS for the monitor mode. The ADC will be completely turned off if no active signal comes from sensors or if an off command is received from the antenna. By turning off the sample hold stage and the first two stages of the pipeline ADC, a significant power saving is achieved. However, the reconfigurable ADC suffers from two drawbacks. First, the leakage signals through the extra off-state switches in the third stage degrade the performance of the data converter. This situation tends to be even worse for high speed and high-resolution applications. An interference elimination technique has been proposed in this work to solve this problem. Simulation results show a significant attenuation of the spurious tones. Moreover, the transistors in the OTA tend to operate in weak inversion region due to the scaling of the bias current. The transistor in subthreshold is very slow due to the small transit frequency. In order to get a better tradeoff between the transconductance efficiency and the transit frequency, reconfigurable OTAs and scalable bias technique are devised to adjust the operating point from weak inversion to moderate inversion. The figure of merit of the reconfigurable ADC is comparable to the previously published conventional pipeline ADCs. For the 10-bit, 40 MSPS mode, the ADC attains a 56.9 dB SNDR for 35.4 mW power consumption. For the 8-bit 2.5 MSPS mode, the ADC attains a 49.2 dB SNDR for 7.9 mW power consumption. The area for the core layout is 1.9 mm2 for a 0.35 micrometer process.

This thesis describes the refinement of a non-destructive, in-line inspection system sensor for the detection of stress corrosion cracks (SCCs) in natural gas pipelines. The sensors are prototype electromagnetic acoustic transducers (EMATs) for noncontact ultrasonic inspection. The focus areas discussed involve the statistically validated performance improvements achieved through the addition of 12 more features, the addition of Principal Component Analysis plus Linear Discriminant Analysis (PCA+LDA) to the classification algorithm, and most significantly the creating of a training set. The training set allowed PCA+LDA to be included in the classification algorithm, as well as allowing one set of no-flaw signature features, one PCA projection matrix, and one LDA projection matrix to be used on multiple pipes and on multiple scanned paths from a pipe. A discrete wavelet decomposition is used to separate the frequency content of each EMAT sample (signature) into five distinct bands. From these decomposed signatures, features are extracted for classification. The classification begins with the projection of the features using the PCA projection matrix derived from the training set, immediately followed by the projection of the PCA projected features using the LDA projection matrix that was also derived from the training set. Finally, the PCA+LDA projected features are classified based on their Mahalanobis distances from the PCA+LDA projected no-flaw training set features. Using the improved feature set and this classification procedure, SCC identification improved 14% and there was an 80% reduction in the number of false positives. In addition, there was a 30% improvement in the detection of the most critical SCCs. SCCs whose average through wall depths were between 35% and 54%.

The Orbitron MASER is a device which can be used to generate R.F. radiation. This device has been operated for many years as a gas filled pulsed device. This thesis describes a brief history, design and operation of several steady-state, hot cathode Orbitron MASER. It also touches on a pulsed Orbitron MASER and the effects the hot cathode has on the radial electric field profile. A detailed derivation of emission frequency, gain and saturation is given in Appendix.

This thesis investigates the potential value of multiple co-located receiver units for telemetry applications. In this thesis, a test board based on the NRF24L01 RF chip produced by Nordic Semiconductor was tested. Testing consisted of sending pseudo-random test data over a link between two test boards at progressive distances. Packet loss rate was identified as the dominant failure mode of the chip, and was used to determine performance increase. A parametric model of the chip performance was developed based on coherent and noncoherent FSK detectors and curve fit to the experimental data to model the performance of a single GFSK receiver with unknown parameters. The chip exhibited an estimated 10 fold improvement in bit error performance at short range, with the performance improvement dropping off as distance increased. This result implies that there may be significant utility to using multiple receiver systems when traditional methods of improving performance such as amplifiers and antennas do not provide the necessary benefit.

Serial Communication is a process of sending one bit at a time, sequentially over a communication channel or a computer bus. RS-232 and RS- 484 are two such examples of the architecture of Serial Communication. This work primarily aims at establishing a communication channel between three entities namely the Controller also called the Console, the Relay Unit and a PC. This work aims at designing the communication model, using the Client-Server architecture and using the MODBUS protocol, as the standard for transmitting the bits in a Remote Terminal Unit (RTU) mode and for framing the characters. The MODBUS protocol also specifies the Cyclic Redundancy Check (CRC) algorithm for error detection which is used as a part of the design for framing of the characters.

This thesis presents work on the testing and development of a complete camera calibration approach which can be applied to a wide range of cameras equipped with normal, wide-angle, fish-eye, or telephoto lenses. The full scale calibration approach estimates all of the intrinsic and extrinsic parameters. The calibration procedure is simple and does not require prior knowledge of any parameters. The method uses a simple planar calibration pattern. Closed-form estimates for the intrinsic and extrinsic parameters are computed followed by nonlinear optimization. Polynomial functions are used to describe the lens projection instead of the commonly used radial model. Statistical information criteria are used to automatically determine the complexity of the lens distortion model. In the first stage experiments were performed to verify and compare the performance of the calibration method. Experiments were performed on a wide range of lenses. Synthetic data was used to simulate real data and validate the performance. Synthetic data was also used to validate the performance of the distortion model selection which uses Information Theoretic Criterion (AIC) to automatically select the complexity of the distortion model. In the second stage work was done to develop an improved calibration procedure which addresses shortcomings of previously developed method. Experiments on the previous method revealed that the estimation of the principal point during calibration was erroneous for lenses with a large focal length. To address this issue the calibration method was modified to include additional methods to accurately estimate the principal point in the initial stages of the calibration procedure. The modified procedure can now be used to calibrate a wide spectrum of imaging systems including telephoto and verifocal lenses. Survey of current work revealed a vast amount of research concentrating on calibrating only the distortion of the camera. In these methods researchers propose methods to calibrate only the distortion parameters and suggest using other popular methods to find the remaining camera parameters. Using this proposed methodology we apply distortion calibration to our methods to separate the estimation of distortion parameters. We show and compare the results with the original method on a wide range of imaging systems.

Operational amplifiers (op amps) are key functional blocks that are used in a variety of analog subsystems such as switched-capacitor filters, analog-to-digital converters, digital-to-analog converters, voltage references and regulators, etc. There has been a growing interest in using such circuits for "extreme environment" electronics, in particular for electronics capable of operating down to deep-cryogenic temperatures for lunar and Martian surface explorations. This thesis presents the design and analysis of a general purpose op amp suited for “extreme environment” applications, with a wide operating temperature range of 93 K to 398 K. The op amp has been implemented using a CMOS architecture to exploit the low temperature operational advantages offered by MOS devices, such as increase in carrier mobility, increased transconductance, and improved switching speeds. The op amp has a two-stage architecture to provide high gain and also incorporates common-mode feedback around the input stage. Tracking compensation has been implemented to provide stable frequency compensation over wide temperature. The op amp has been fabricated in a commercial 0.35-μm 3.3-V SiGe BiCMOS process. The op amp has been tested for the temperature range of 93 K to 398 K and is unity-gain stable and fully functional over this range. This thesis begins with a study of the impact of temperature on MOS devices and operational amplifiers. Next, the design of the wide temperature general-purpose operational amplifier is presented along with an analysis of the common-mode feedback circuit. The op amp is then characterized using simulation results. Finally, the test setup is presented and the measurement results are compared with those from simulation.

With the advances in communications, frequency synthesizers are becoming essential for many different circuits and broadcast bands. This need led to the creation of the fractional N frequency synthesizer. This synthesizer has proven itself to be a great invention allowing for many improvements over similar concepts. However, it only reaches the full extents of its capabilities when it is combined with a Delta Sigma modulator. This combined circuit shows great advances in noise performance and frequency resolution. The fractional N frequency synthesizer is merely an integer N PLL with the ability to change the division ratio. The first attempts to change this ratio used an accumulator which is a first order Delta Sigma modulator. The single order versions were swiftly discarded for higher order models for their better noise performance. Delta Sigma modulators, or DSM, are separated into two architecture types, MASH and MBSL. MASH modulators are easier to build and unconditionally stable. Unfortunately, they create more noise than MBSL and require more output states for the same division ratio. MBSL modulators create less noise; their noise shaping is more flexible and uses less outputs for the same division. However, MBSL modulators are complex and have some unstable inputs. This work steps through the design of a MASH 1-1-1 modulator using its basic equations. Also, it covers the implementation of the circuit on a FPGA board and its testing as part of a frequency synthesizer operating in the 2.4 GHz frequency band. For this work, the Spartan-3 board is used in addition to a PLL built before to create the circuit. The testing is done using a spectrum analyzer to see if the synthesizer creates the right output frequency. Several tests are performed to see the accuracy of the synthesizer over a portion of the frequency band. The circuit proves to be successful, creating frequencies within one percent of its target values. Initial tests without the DSM were around two percent of the target values. The work goes on to describe future projects. The major one to be the creation of a frequency modulated transmitter by using the synthesizer constructed and adding a digital filter to adjust the data.