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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
361

A Standard CMOS Compatible Bandgap Voltage Reference with Post-Process Digitally Tunable Temperature Coefficient

Caylor, Sam D 01 December 2007 (has links)
An essential element of most robust analog/mixed-signal systems is a stable and precise bandgap voltage reference (BGR). CMOS compatible BGR circuits are generally limited by variability in output drift over temperature due to process variations. In this work a CMOS BGR is developed that provides simple, digitally-controlled post-process (i.e., post fabrication) trimming. The trimming is achieved through MOSFET switches used to adjust a current gain factor for the thermal voltage referenced current within the BGR circuit. This current is proportional to absolute temperature (PTAT). The PTAT current is injected into a series connected resistor and diode to ultimately provide an output voltage. The output voltage's temperature coefficient is correlated to the current gain factor applied to the internally generated PTAT current. Thus, the BGR circuit's temperature coefficient (and therefore drift) is adjusted or tuned using a digital input word to control switch settings and therefore the PTAT current. By providing post-process trimming, chip-to-chip and wafer-to-wafter variations can be minimized through simple digitally controlled tuning. This trimming capability also extends the BGR to broad temperature range applications. A complete CMOS-compatible post-process trimmable BGR implementation is described and measurement results are provided. Design considerations to enhance the circuit's tolerance to radiation induced single-event transients are also addressed.
362

MPI-based Parallel Solution of Sparse Linear Systems Using Chio's Condensation Algorithm and Test Data from Power Flow Analysis

Armistead, Robert Bernard 01 May 2010 (has links)
Solving sparse systems of linear equations permeates power system analysis. Newton-Raphson, decoupled, and fast decoupled algorithms all require the repeated solving of sparse systems of linear equations in order to capture the steady state operational conditions of the power system under test. Solving these systems of equations is usually done using LU Factorization which has an order of complexity O(n3) where n represents the number of equations in the system. The Chio’s condensation algorithm is an alternative approach, which in general has a complexity of O(n4). However, it has a straightforward formulation that can be easily implemented in a parallel computing architecture. Previous research has not investigated the application of the Chio’s algorithm under sparse matrix, which is typical for power system analysis. This thesis presents a MPI-based parallel solution of sparse linear systems using Chio’s condensation algorithm and realistic test data from power flow analysis. Different sparse matrix techniques are discussed, and a reordering scheme is applied to further improve the efficiency for solving the sparse linear system.
363

Predictive Models of an Electro-mechanical Driving System for Failure Testing of Strain Gauges

Ellis, Brent 01 August 2007 (has links)
Strain gauges are bonded at high stress locations on the surface of critical structural components such as turbine blades to measure fatigue characteristics and detect early warning signs of high cycle fatigue. However, strain gauges do not always report expected measurements. The usual response by maintenance technicians to these failing signals is to investigate the component for weakness, check the placement of the gauges on the component, or examine the instrumentation for failure or damage. However, little research has been conducted to show when the failing signals are the fault of the strain gauge. Such failure modes of strain gauges include improper gauge installation, over-straining, operating outside the temperature limits, physical damage and environmental wear, and improper gauge selection. Failure Modes and Effects Analysis, FMEA, is a methodology for monitoring failure modes and their potential effects, causes, and solutions. This research consisted of the introductory steps in developing and analyzing a laboratory setup for FMEA strain gauge testing and analysis. The primary goal of this research was to develop predictive models for strain gauge responses under controlled laboratory conditions. A testing station was developed that generated a mechanical motion on a beam, subjecting strain gauges to a sinusoidally-varying strain. Predictive models of the testing station were developed and experimentally analyzed. Models were also developed for two particular failure modes, debonding and wire lead termination, and experimental analysis was conducted. In general, the models adequately describe the operation of a strain gauge operating under normal conditions and in the studied failure mode. Predicted and experimental data are presented that show the characteristic signals in terms of time domain, histogram, and frequency domain analysis.
364

Model Reduction Techniques for Fluid Dynamical Flow Based PDE Control Problems

Foster, Jason Harold 01 August 2007 (has links)
This thesis deals with the practical and theoretical implications of model reduction for aerodynamical flow based control problems. Various aspects of model reduction are discussed that apply to Partial Differential Equation (PDE) based models in general. Specifically, the Proper Orthogonal Decomposition (POD) of a high dimension system is discussed as well as frequency domain identification methods are discussed for initial model creation. Projections on the POD basis give a Galerkin model. Then, the methods of balanced truncation and Hankel optimal norm reduction are applied to the Galerkin model. A state space model is formed by a Galerkin projection of the governing equations and initial conditions onto the POD basis. Further, the weak Galerkin model is simulated with white noise to produce inputs to the Eigensystem Realization Algorithm (ERA). This method estimates a system that accurately reproduces the output of the POD based model. Then, balanced truncation is used to show that model reduction is still effective on ERA produced approximated systems. Finally a method of finding empirical controllability and observability Gramians for the approximated system is introduced. After the empirical Gramians are approximately balanced, the necessary transformation matrix can be applied back to the original system. This empirically balanced realization can then be truncated to further reduce the system model size while retaining the most important system dynamics. The effectiveness of the empirically balanced realization for the linearized model is compared with the balanced truncation of the linearized Galerkin model. Finally, conclusions about the relative effectiveness of the model reduction techniques are made and some possible future research directions are discussed.
365

Evaluation of Losses in HID Electronic Ballast Using Silicon Carbide MOSFETs

Gopi Reddy, Lakshmi Reddy 01 December 2007 (has links)
HID lamps are used in applications where high luminous intensity is desired. They are used in a wide range of applications from gymnasiums to movie theatres, from parking lots to indoor aquaria, from vehicle headlights to indoor gardening. They require ballasts during start-up and also during operation to regulate the voltage and current levels. Electronic ballasts have advantages of less weight, smooth operation, and less noisy over electromagnetic ballasts. A number of topologies are available for the electronic ballast where control of power electronic devices is exploited to achieve the performance of a ballast for lighting. A typical electronic ballast consists of a rectifier, power factor control unit, and the resonant converter unit. Power factor correction (PFC) was achieved using a boost converter topology and average current mode control for gate control of the boost MOSFET operating at a frequency of 70 kHz. The PFC was tested with Si and SiC MOSFET at 250 W resistive load for varying input from 90 V to 264 V. An efficiency as high as 97.4% was achieved by Si MOSFET based PFC unit. However, for SiC MOSFET, the efficiency decreased and was lower than expected. A maximum efficiency of 97.2% was achieved with the SiC based PFC. A simulation model was developed for both Si and SiC MOSFET based ballasts. The efficiency plots are presented. A faster gate drive for SiC MOSFET could improve the efficiency of the SiC based systems.
366

A Longest-Queue-First Signal Scheduling Algorithm with Quality of Service Provisioning for an Isolated Intersection

Wunderlich, Richard James 01 December 2007 (has links)
In today's fast-paced society, the need to travel using automobiles is increasingly important. Aside from the road itself, the intersection is the most basic unit of a traffic system. As such, controlling the flow of traffic through intersections in an efficient manner has become a task of the utmost importance. The signal-scheduling algorithm described in this thesis is designed for just such a task. Concepts are drawn from the field of packet switching in computer networks and are applied to the traffic control problem. The method proposed utilizes a maximal weight matching algorithm to minimize the queue sizes at each approach to the intersection. The goal is to provide lower average vehicle delay as compared to a current state-of-the-art traffic signal control method. In particular, a focus is given to providing increased levels of service to high-priority vehicle classes (such as emergency vehicles or large trucks). Because the minimization of vehicle queues forms the basis of the algorithm, it is important to establish the conditions under which the system is guaranteed to be stable (i.e. the queue sizes are finite); to this end, Lyapunov function-based analysis is provided. Using a traffic simulation environment, the proposed control method is compared to control methods currently implemented in the field. The results of the simulations show that the performance gain obtained when using the proposed method can be substantial, particularly in the case where prioritization among multiple classes of vehicles is desired.
367

Compressive Sensing Using Random Demodulation

Boggess, Benjamin Scott 01 August 2009 (has links)
The new theory of Compressive Sensing allows wideband signals to be sampled at a rate much closer to the information contained within. This rate is much lower than the Nyquist rate required by Shannon’s sampling theory. This “Analog to Information Conversion” has allowed an outlet for already overloaded Analog to Digital converters [15]. Although the locations of frequencies can’t be known a priori, the expected sparseness of a signal can be. This is the circumstance that allows this method to be possible. In order to accomplish this very low rate, there is some trade off in sampling rate reduction to computing load. In contrast to the uniform sampling in common acquisition processes, nonlinear methods must be used resulting in convex programming algorithms becoming a necessity to recover the signal. This thesis tests this new theory using a Random Demodulation data acquisition scheme set forth in [1]. The scheme involves a demodulation step that spreads the information content across the spectrum before an anti-aliasing filter prepares for an Analog to Digital converter to sample it at a very slow rate. The acquisition process is simulated using a computer, the data is run through an optimization algorithm and the recovery results are analyzed. Finally, the paper then compares the results to the Compressive Sensing theoretical and empirical results of others.
368

FPGA-based Image Analysis System for Cotton Classing

Sharafat, Muhammad Imran 01 December 2007 (has links)
The design and implementation of an FPGA (field-programmable gate array) based image analysis system was undertaken to replace an older system whose components have become obsolete. Video from an analog camera is digitized by a video decoder. The data from the video decoder is stored in memory and then processed using an FPGA. The results are then transmitted over a universal serial bus (USB) to a host personal computer for additional processing. The system also controls the timing of a flash to correctly capture the images; it measures color and reflectance and is used to classify the quality of raw cotton by determining the concentration of impurities (e.g. leaves or trash). The original system is first described and the need for upgrading presented. The goals of the new system are then specified and its implementation presented along with the design space tradeoffs that were considered. Finally, the results obtained from using the new system are presented to demonstrate its effectiveness.
369

Modeling chaotic systems

Al-Mughadhawi, Khaled Marzoug January 2005 (has links) (PDF)
Thesis (Ph. D.)--Oklahoma State University, 2005. / Vita. Includes bibliographical references.
370

Job shop optimization through multiple independent particle swarms

Ivers, Brian January 2006 (has links) (PDF)
Thesis (M. S.)--Oklahoma State University, 2006. / Vita. Includes bibliographical references.

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