NDLTD Global ETD Search
  • Refine Query
  • Source
  • Publication year
  • to
  • Language
  • 88
  • 18
  • 17
  • 10
  • 10
  • 9
  • 5
  • 4
  • 4
  • 3
  • 1
  • 1
  • 1
  • Tagged with
  • 204
  • 204
  • 204
  • 204
  • 106
  • 38
  • 35
  • 35
  • 32
  • 29
  • 28
  • 26
  • 24
  • 24
  • 23
  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.

Search results

Showing 1 to 10 of 204 (0.019 seconds)
1

Preemptive multitasking auf FPGA-Prozessoren : ein Betriebssystem für FPGA-Prozessoren /

Simmler, Harald C. January 2001 (has links)
Mannheim, Univ., Diss., 2001.
Field programmable gate array
2

Ein generisches Konzept zur Modellierung und Bewertung feldprogrammierbarer Architekturen

Wolz, Frank. January 2004 (has links) (PDF)
Würzburg, Univ., Diss., 2004. / Erscheinungsjahr auf Titelseite: 2003.
Field programmable gate array
3

Fault emulation reconfigurable hardware based fault simulation using logic emulation systems with optimized mapping /

Sedaghat Maman, Reza. January 1999 (has links) (PDF)
Hannover, University, Diss., 1999.
Field programmable gate array
4

Ein generisches Konzept zur Modellierung und Bewertung feldprogrammierbarer Architekturen

Wolz, Frank. January 2004 (has links) (PDF)
Würzburg, Universiẗat, Diss., 2004. / Erscheinungsjahr an der Haupttitelstelle: 2003.
Field programmable gate array
5

Das FPGA-Entwicklungssystem CHDL eine vollständige, C++-basierte Entwicklungsumgebung für FPGA-Koprozessoren /

Kornmesser, Klaus. January 2004 (has links) (PDF)
Mannheim, Universiẗat, Diss., 2004.
Field programmable gate array
6

Design of an FPGA based parallel architecture processor for displaying CSG volumes and surfaces

Cevik, Ulus January 1996 (has links)
No description available.
621.3994
Field programmable gate array
7

Genetic programming in hardware

Martin, Peter N. January 2003 (has links)
No description available.
006
Field programmable gate array
8

Dynamically reconfigurable intellectual property cores

MacBeth, John Stuart January 2003 (has links)
No description available.
621
Field programmable gate array
9

Design and implementation of a high level image processing machine using reconfigurable hardware

Donachy, Paul January 1996 (has links)
No description available.
621.3994
Field Programmable Gate Array
10

Using FPGA Co-processors for Improving the execution Speed of Pattern Recognition Algorithms in ATLAS LVL2 Trigger

Khomich, Andrei. January 2006 (has links)
Mannheim, Univ., Diss., 2006.

Page generated in 0.0243 seconds