Human activities are altering species' environments, consequently driving many to extinction and changing biotic communities worldwide. Functional traits are species’ intrinsic characteristics that shape their roles in an environment. Loss of functional diversity compromises ecosystem processes and potentially the resilience of communities facing further change. Biological homogenization reflects the non-random loss of species and possibly also of trait distributions within community, leading to the increasing ubiquity of some traits and growing rarity of others. By changing the composition and configuration of species’ local habitat and their regional surroundings, land use can alter community dynamics. The extent to which land uses within habitats and across the surrounding landscape matrix alter the distribution of functional traits in biotic communities remains highly uncertain but could determine how to design management strategies intended to aid conservation. Here, I investigate the relative contributions of compositional and configurational landscape characteristics at local and regional scales on the diversity and composition of functional traits within butterfly communities. I constructed models to identify landscape predictors of functional trait diversity but found no significant associations with individual traits. Managing habitat quality by fostering compositional and configurational heterogeneity in the local landscape can improve functional diversity. However, efforts to facilitate conservation of species with rare traits necessitates maintaining compositional and configurational variety within habitats and in the surrounding matrix.

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In this paper, two methods for the design of active analog feedback bandpass filter pairs are examined. A third method is presented that does not use extra amplifiers for summation nor multicoupling. This third method uses identical bandpass amplifies and employs resistor summing to provide multicoupling. The name of this configuration is the "Dual Amplifier Bandpass Filter Employing Resistor Summing" (DABFERS). This configuration is economically attractive, has low sensitivity and better phase lag characteristics. In addition, third order prototypes are examined and a solution method for higher order prototypes is suggested.

The problem of designing sharp cutoff filters with monotonic step responses is addressed. The impulse responses of the filters are expanded in terms of finite duration trigonometric polynomials. The coefficients of the trigonometric polynomials are obtained, for arbitrary frequency penalty functions, by solving a generalized eigenvalue problem. Once the trigonometric polynomial is specified the network can be synthesized with known techniques. Two theorems which assist in the numerical solution are proven.

The iAPX 86/20 (8086 with the 8087 numeric coprocessor) is considered for digital filtering. The advantage in using the iAPX 86/20 lies in the 80-bit width of the 8087 floating-point arithmetic-registers. With such large arithmetic registers, the effects of coefficient roundoff and arithmetic roundoff errors on the filter output are reduced. The price paid for the improved numerical performance is the increased time spent by the system moving data to and from memory. The method of Knowles and Olcayto for measuring the effect of coefficient roundoff is studies in detail. This method is applied to an example filter in order to demonstrate that the iAPX 86/20 can meet filter specifications that the 8086 without the numeric coprocessor (iAPX 86/10) cannot meet.

This paper defines a variable transfer function that is used to compensate for low frequency structural resonances in a turret so that stabilization of a closed loop servo system can be achieved. Three circuits for implementing this compensation are presented. They are: the feedforward three amplifier biquad, the summing four amplifier biquad, and the single amplifier biquad with pole-zero cancellation. Design equations allowing the engineer to go directly from the given transfer function to the actual component values are developed for each circuit. A comparison of the final circuit designs is also presented.

No / Finite impulse response (FIR) digital filters are extensively used due to their key role in various digital signal processing (DSP) applications. Several attempts have been made to develop hardware realization of FIR filters characterized by implementation complexity, precision and high speed. Field Programmable Gate Array is a reconfigurable realization of FIR filters. Field-programmable gate arrays (FPGAs) are on the verge of revolutionizing digital signal processing. Many front-end digital signal processing (DSP) algorithms, such as FFTs, FIR or IIR filters, are now most often realized by FPGAs. Modern FPGA families provide DSP arithmetic support with fast-carry chains that are used to implement multiply-accumulates (MACs) at high speed, with low overhead and low costs. In this paper, distributed arithmetic (DA) realization of FIR filter as serial and parallel are discussed in terms of hardware cost and resource utilization.