Thesis(M.S.)--Auburn University, 2006. / Abstract. Vita. Includes bibliographic references (p.60-63).

This study explored a 130-passenger advanced turboprop commercial airliner with the purposes of economic feasibility and energy efficiency. A baseline vehicle and a derivative vehicle were researched and analyzed in detail. Based on the findings of this analysis, an advanced future airliner was designed. For the advanced airliner, advanced technologies were suggested and projections of these technology benefits were implemented. Detailed performance analysis was conducted for all three aircraft. The energy efficiency of each vehicle was compared to current and future N+3 aircraft. Lastly, cost analysis was performed to observe the impact of these energy savings. The three existing and future concepts evaluated were: 1) Bombardier 80- passenger Q400 baseline, 2) An expanded 130-passenger Bombardier Q400 termed the Q400XL, and 3) an N+3 advanced 130-passenger turboprop airliner termed the N+3 Airliner. The N+3 Airliner was compared to the SUGAR High, a Boeing/NASA N+3 aircraft, in both fuel efficiency and economic feasibility. The N+3 Airliner was 22 percent more energy efficient. At current oil prices, the N+3 Airliner had nearly identical operating cost. However, at two times current oil prices, the N+3 Airliner has a slight advantage economically. Therefore, as long as the price of oil is above 2011 oil prices, $3.03 per barrel, the N+3 Airliner will be an economically viable option. / Ph. D.

The purpose of this study was to extend the analysis methods in PACELAB APD 3.1, a recent commercially available aircraft preliminary design tool with potential for MDO applications, for higher fidelity with physics-based instead of empirical methods and to enable the analysis of nonconventional aircraft configurations. The implementation of these methods was first validated against both existing models and wind tunnel data. Then, the original and extended PACELAB APD versions were used to perform minimum-fuel optimizations for both a traditional cantilever and strut-braced wing aircraft for a medium-range regional transport mission similar to that of a 737-type aircraft, with a minimum range of 3,115 nm and a cruise Mach number of 0.78. The aerodynamics, engine size / weight estimation and structural modules were heavily modified and extended to accomplish this. Comparisons to results for the same mission generated with FLOPS and VT MDO are also discussed. For the strut-braced configuration, large fuel savings on the order of 37% over the baseline 737-800 aircraft are predicted, while for the cantilever aircraft savings of 10-30% are predicted depending on whether the default or VT methods are utilized in the PACELAB analysis. This demonstrates the potential of the strut-braced configuration for reducing fuel costs, as well as the benefit of MDO in the aircraft conceptual design process. For the cantilever aircraft, FLOPS and VT MDO predict fuel savings of 8% and 23%, respectively. VT MDO predicts a fuel savings of 28% for the strut-braced aircraft over the baseline. / Master of Science

No / Chemical means of manipulating the distribution of lipids across biological membranes is of considerable interest for many biomedical applications as a characteristic lipid distribution is vital for numerous cellular functions. Here we employ atomic-scale molecular simulations to shed light on the ability of certain amphiphilic compounds to promote lipid translocation (flip-flops) across membranes. We show that chemically induced lipid flip-flops are most likely pore-mediated: the actual flip-flop event is a very fast process (time scales of tens of nanoseconds) once a transient water defect has been induced by the amphiphilic chemical (dimethylsulfoxide in this instance). Our findings are consistent with available experimental observations and further emphasize the importance of transient membrane defects for chemical control of lipid distribution across cell membranes

Made available in DSpace on 2016-03-15T19:46:37Z (GMT). No. of bitstreams: 1 Rose Cristina de Araujo Duarte.pdf: 776946 bytes, checksum: be3c02bda121263709b51293d30521c9 (MD5) Previous issue date: 2008-02-26 / Secretaria da Educação do Estado de São Paulo / Publicity requires various functions in communication that vary according to the purpose of the company. Thus, the purpose of this study was to study the publicitary campaign of the havaianas flip-flops, having as focus the verbal and non verbal languagues which approached the conjunct made by image and colors. This way, the research was based on theorists, like: Kotler, Farina, Greimas, Semprini, among others. The period chosen was from 1994 to 2006, because in 1994 the São Paulo Alpargatas company was renewed in the Havaianas section. Thus, a campaign analyzis was done as for the structure of the advertising, verbal and on verbal elements in the period chosen with intervals of three years. Thus, it is observed that the investments made to make the brand more dynamical improved the final product. There was a noticeable change in colors which contributed to awake the public and gain space in the pressed media, the publicitary discourse was adequated to the target public. At last, it was observed that the changes pleased the public and there was an increase on the product sales, in both national and international market. / A publicidade exerce inúmeras funções na comunicação que variam, conforme o propósito de cada empresa. Desta forma, este estudo teve como objetivo estudar a campanha publicitária das sandálias havaianas, tendo como enfoque as linguagens verbal e não-verbal que abordasse o conjunto imagem e cores. Sendo assim, a pesquisa baseou-se em teóricos, como: Kotler, Farina, Greimas, Semprini dentre outros. O período escolhido foi de 1994 a 2006, porque em 1994 que a empresa São Paulo Alpargatas modernizou-se na divisão havaianas. Assim, foi realizada uma análise das campanhas quanto à estrutura do anúncio, elementos verbais e não-verbais no período escolhido com intervalos de três anos. Observou-se que os investimentos realizados para dinamizar a marca fizeram elevar o produto final. Houve uma notória mudança nas cores que contribuíram para despertar o público e ganhar espaço na propaganda impressa; o discurso publicitário adequou-se ao público-alvo. Finalmente, observou-se que as mudanças agradaram e houve um aumento nas vendas do produto, tanto no mercado nacional como internacional.

<p>This thesis explores the energy-delay space of eight widely referred flip-flops in a 0.13µm CMOS technology. The main goal has been to find the smallest set of flip-flop topologies to be included in a “high performance” flip-flop cell library covering a wide range of power-performance targets. Based on the comparison results, transmission gate-based flip-flops show the best powerperformance trade-offs with a total delay (clock-to-output + setup time) down to 105ps. For higher performance, the pulse-triggered flip-flops are the fastest (80ps) alternatives suitable to be included in a flip-flop cell library. However, pulse-triggered flip-flops consume significantly larger power (about 2.5x) compared to other fast but fully dynamic flip-flops such as TSPC and dynamic TG-based flip-flops.</p>

This thesis explores the energy-delay space of eight widely referred flip-flops in a 0.13µm CMOS technology. The main goal has been to find the smallest set of flip-flop topologies to be included in a “high performance” flip-flop cell library covering a wide range of power-performance targets. Based on the comparison results, transmission gate-based flip-flops show the best powerperformance trade-offs with a total delay (clock-to-output + setup time) down to 105ps. For higher performance, the pulse-triggered flip-flops are the fastest (80ps) alternatives suitable to be included in a flip-flop cell library. However, pulse-triggered flip-flops consume significantly larger power (about 2.5x) compared to other fast but fully dynamic flip-flops such as TSPC and dynamic TG-based flip-flops.

With rapid technology scaling, flip-flops are becoming more susceptible to metastability due to tighter timing budgets and the more prominent effects of process, temperature, and voltage variation that can result in frequent setup and hold time violations. This thesis presents a detailed methodology and analysis on the design of metastable-hardened, high-performance, and low-power flip-flops. The design of metastable-hardened flip-flops is focused on optimizing the value of τ mainly due to its exponential relationship with the metastability window δ and the mean-time-between-failure (MTBF). Through small-signal modeling, τ is determined to be a function of the load capacitance and the transconductance in the cross-coupled inverter pair for a given flip-flop architecture. In most cases, the reduction of τ comes at the expense of increased delay and power. Hence, two new design metrics, the metastability-delay-product (MDP) and the metastability-power-delay-product (MPDP), are proposed to analyze the tradeoffs between delay, power and τ. Post-layout simulation results have shown that the proposed optimum MPDP design can reduce the metastability window δ by at least an order of magnitude depending on the value of the settling time and the flip-flop architecture. In this work, we have proposed two new flip-flop designs: the pre-discharge flip-flop (PDFF) and the sense-amplifier-transmission-gate (SATG) based flip-flop. Both flip-flop architectures facilitate the usage in both single and dual-supply systems as reduced clock-swing flip-flop and level-converting flip-flop. With a cross-coupled inverter in the master-stage that increases the overall transconductance and a small load transistor associated with the critical node, the architecture of both the PDFF and the SATG is very attractive for the design of metastable-hardened, high-performance, and low-power flip-flops. The amount of overhead in delay, power, and area is all less than 10% under the optimum MPDP design scheme when compared to the traditional optimum PDP design. In designing for metastable-hardened and soft-error tolerant flip-flops, the main methodology is to improve the metastability performance in the master-stage while applying the soft-error tolerant cell in the slave-stage for protection against soft-error. The proposed flip-flops, PDFF-SE and SATG-SE, both utilize a cross-coupled inverter on the critical path in the master-stage and generate the required differential signals to facilitate the usage of the Quatro soft-error tolerant cell in the slave-stage.

Low-power digital design has been a widely researched area for the past twenty years. The growing demand for mobile computing made low power an especially important quality for such systems and encouraged researchers to find new ways of reducing power dissipation. Aggressive voltage scaling was recently published as a new paradigm for reducing power dissipation in digital circuits and the use of soft-edge flip-flops is one such technique in this category. In this thesis, we propose a soft-edge flip-flop topology that is better suited to implement the soft-edge property compared to the previously published implementations. In addition, we present the effectiveness of the soft-edge flip-flop technique by applying it to a practical VLSI design implemented with the TSMC 0.18um standard cell library. Using HSIM transistor-level SPICE simulator, we show that at least 25% power reduction is achievable in the whole circuit with a negligible area overhead. / text

With rapid technology scaling, flip-flops are becoming more susceptible to metastability due to tighter timing budgets and the more prominent effects of process, temperature, and voltage variation that can result in frequent setup and hold time violations. This thesis presents a detailed methodology and analysis on the design of metastable-hardened, high-performance, and low-power flip-flops. The design of metastable-hardened flip-flops is focused on optimizing the value of τ mainly due to its exponential relationship with the metastability window δ and the mean-time-between-failure (MTBF). Through small-signal modeling, τ is determined to be a function of the load capacitance and the transconductance in the cross-coupled inverter pair for a given flip-flop architecture. In most cases, the reduction of τ comes at the expense of increased delay and power. Hence, two new design metrics, the metastability-delay-product (MDP) and the metastability-power-delay-product (MPDP), are proposed to analyze the tradeoffs between delay, power and τ. Post-layout simulation results have shown that the proposed optimum MPDP design can reduce the metastability window δ by at least an order of magnitude depending on the value of the settling time and the flip-flop architecture. In this work, we have proposed two new flip-flop designs: the pre-discharge flip-flop (PDFF) and the sense-amplifier-transmission-gate (SATG) based flip-flop. Both flip-flop architectures facilitate the usage in both single and dual-supply systems as reduced clock-swing flip-flop and level-converting flip-flop. With a cross-coupled inverter in the master-stage that increases the overall transconductance and a small load transistor associated with the critical node, the architecture of both the PDFF and the SATG is very attractive for the design of metastable-hardened, high-performance, and low-power flip-flops. The amount of overhead in delay, power, and area is all less than 10% under the optimum MPDP design scheme when compared to the traditional optimum PDP design. In designing for metastable-hardened and soft-error tolerant flip-flops, the main methodology is to improve the metastability performance in the master-stage while applying the soft-error tolerant cell in the slave-stage for protection against soft-error. The proposed flip-flops, PDFF-SE and SATG-SE, both utilize a cross-coupled inverter on the critical path in the master-stage and generate the required differential signals to facilitate the usage of the Quatro soft-error tolerant cell in the slave-stage.