The promise and potential of controllers that can reconfigure themselves in the case of control effector failures and uncertainties, and yet guarantee stability and provide satisfactory performance, has led to fault tolerant control being an active area of research. This thesis addresses this issue with the design of two fault tolerant nonlinear Structured Adaptive Model Inversion control schemes for systems with fixed magnitude discrete controls. Both methods can be used for proportional as well as discrete controls. However, discrete controls constitute a different class of problems than proportional controls as they can take only binary values, unlike proportional controls which can take many values. Two nonlinear control laws based on Structured Adaptive Model Inversion are developed to tackle the problem of control failure in the presence of plant and operating environment uncertainties. For the case of redundant actuators, these control laws can provide a unique solution. Stability proofs for both methods are derived and are presented in this thesis. Fault Tolerant Structured Adaptive Model Inversion that has already been developed for proportional controls is extended here to discrete controls using pulse width modulation. A second approach developed in this thesis is Fault Tolerant Control Allocation. Discrete control allocation coupled with adaptive control has not been addressed in the literature to date, so Fault Tolerant Control Allocation for discrete controls is integrated with SAMI to produce a system which not only handles discrete control failures, but also accounts for uncertainties in the plant and in the operating environment. Fault tolerant performance of both controllers is evaluated with non real-time nonlinear simulation for a complete Mars entry trajectory tracking scenario, using various combinations of control effector failures. If a fault is detected in the control effectors, the fault tolerant control schemes reconfigure the controls and minimize the impact of control failures or damage on trajectory tracking. The controller tracks the desired trajectory from entry interface to parachute deployment, and has an adaptation mechanism that reduces tracking errors in the presence of uncertainties in environment properties such as atmospheric density, and in vehicle properties such as aerodynamic coefficients and inertia. Results presented in the thesis demonstrate that both control schemes are capable of tracking pre-defined trajectories in the presence of control failures, and uncertainties in system and operating environment parameters, but with different levels of control effort.

Reliable communication in the hypercube with the safety vectors is discussed in this thesis. In the hypercube, the safety levels and the safety vectors, used to guide fault-tolerant routing, is a kind of limited global information based methods. The transmission cost of the safety vectors is O(n2) for each node. For increasing the probability of optimal routing, we attempt to increase the transmission cost for obtaining more information. We propose two methods with O(n3) transmission cost in each node, the enhanced safety vector and the spanning safety vector, to achieve the goal. We also propose the probabilistic safety vector which provides the probability of optimal routing for each node. Finally, our experiments show that the routing with the enhanced safety vector is more reliable than the safety vectors and the extended safety vectors, which were propose the probabilistic safety vector.

Message routing is a fundamental function of a network, and fault-tolerance is an important tool to ensure the quality of service of a network. Assume that network contain only one faulty element. In order to ensure the message can be arrived. We present a fault-tolerant message routing algorithm which being the secondary path, as the optimal path can't be connected in the double-loop networks.

Fault tolerant control can accommodate the component faults in a control system such as sensors, actuators, plants, etc. This dissertation presents two fault tolerant control schemes to accommodate the failures of power amplifiers and sensors in a magnetic suspension system. The homopolar magnetic bearings are biased by permanent magnets to reduce the energy consumption. One control scheme is to adjust system parameters by swapping current distribution matrices for magnetic bearings and weighting gain matrices for sensor arrays, but maintain the MIMO-based control law invariant before and after the faults. Current distribution matrices are evaluated based on the set of poles (power amplifier plus coil) that have failed and the requirements for uncoupled force/voltage control, linearity, and specified force/voltage gains to be unaffected by the failure. Weighting gain matrices are evaluated based on the set of sensors that have failed and the requirements for uncoupling x1 and x2 sensing, runout reduction, and voltage/displacement gains to be unaffected by the failure. The other control scheme is to adjust the feedback gains on-line or off-line, but the current distribution matrices are invariant before and after the faults. Simulation results have demonstrated the fault tolerant operation by these two control schemes.

With the progress in VLSI technology, the external environment makes it easier for the interference affected the operation of microcontroller. The design of the recently microcontroller, not only the pursuit of speed and performance, also began the study of the various fault-tolerant technology to enhance the reliability and safety. This thesis, being designed for the Fault-tolerant microcontroller according market, presents a Robust Micro-Control Unit : RMCU for dual core architecture of ARM9 ISA. The RMCU provides two operation modes: synchronize mode and Processor test mode for fault-tolerant mechanism. In synchronize mode, both processors are executing the same program concurrently. The results generated by processors are compared, and every mismatch indicates a transient fault in one of the two processors. When the transient fault occurred, the two processors will use Instruction retry mechanism, recover system operation. If the same address's errors larger than the number of settings are considered permanent fault, processors will be held, and entered the processor test mode for processor functional test. In accordance with the test results to close the wrong processor and operating system back to normal. This approach to solve the traditional dual-core processor fault-tolerant architecture that can not be fixed to permanent-fault restrictions. In addition to the design of fault-tolerance mechanism, for the upgrading of software and hardware development and validation of this paper design of the RMCU debug platform. RMCU debug platform including JTAG-based OCD (On-Chip Debugging) unit, and debug interface program. In addition to providing read and write registers and memory, set Breakpoint, Watchpoint and single-step but also take the initiative to increase the external interrupt inserted to provide a more effective ISR (Interrupt Service Routine) debug. In the last of the thesis, we use the FPGA Implementation of the RMCU fault-tolerant mechanisms and debug platform. After simulation and testing, the results prove the feasibility of RMCU.

Due to advancement of semiconductor technology, a system can be designed in a single chip, we call it a system on chip (SOC). An SOC usually reuses silicon intellectual properties (SIP). This speeds up design time and increase correctness of the chip. Memory modules play an important role in an SOC. Under various system requirements, different memory modules should be used. In this research, in order to satisfy various design requirements of memory modules, we designed various advanced and application-specific functional features to be added into memory modules. We planed a configuration method and implemented needed component designs, including fault tolerance, encryption, and allocation. Hence, we can speed up design time and increase design correctness of such memory module designs.

Zugl.: @Chemnitz, Techn. Univ., Diss.

Thesis (Ph. D.)--University of Texas at Austin, 2000. / Vita. Includes bibliographical references (leaves 131-144). Available also in a digital version from Dissertation Abstracts.

Thesis (M.S. in Information Technology Management and M.S. in Computer Science)--Naval Postgraduate School, September 2003. / Thesis advisor(s): Geoffrey Xie, Alex Bordetsky. Includes bibliographical references (p. 47-48). Also available online.

Thesis (M.S.)--Mississippi State University. Department of Computer Science. / Title from title screen. Includes bibliographical references.