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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
41

Charge Injection and Transport in Pentacene Field-Effect Transistors

Masurkar, Amrita Vijay January 2017 (has links)
Since the seminal discovery of conductive polymers four decades ago, organic electronics has grown from an exploratory field to an industry offering novel consumer products. Research has led to the synthesis of new organic molecules and polymers and their applications: organic field-effect transistors (OFETs), organic light-emitting diodes, and organic photovoltaics. The goal for research as well as for industry is producing low-cost, flexible, and, ultimately, sustainable, electronics. Although on the rise, organic electronics faces several challenges: air instability, reliability, and scaling, to name a few. And despite that organic devices and larger systems have been demonstrated, there remains a gap in understanding underlying mechanisms behind light absorption, photoconduction, charge transport and conduction in them. The primary purpose of this thesis is to use a relatively under utilized technique, photocurrent microscopy (PCM), to directly probe charge carriers in pentacene and 6,13-Bis(triisopropylsilylethynyl) (TIPS) pentacene FETs to learn about charge injection and transport. The latter part of the thesis focuses on the use of thiols to modify electrode properties to both increase charge injection efficiency and to provide passivation to low-work function metal electrodes. It is demonstrated for the first time experimentally by directly probing the OFET channel that top-contact geometry OFETs suffer minimally from a charge injection barrier, and that trap filling and altering of trap density-of-states in the channel is directly observable with PCM. PCM was used to investigate grains and grain boundaries in TIPS-pentacene devices. By varying gate bias, it was shown that the PCM maps of grains are not simply a result of varying absorption on the surface of the film; rather, it is an artefact of charge transport between grains and grain boundaries. Through this study, PCM was shown to be a useful, large-area scanning technique, for observing transport in devices with large (on the order of 50 $\mu$m) grains. This is particularly relevant as solution-proccessable films are likely to dominate the flexible electronics industry. The thiol portion of this thesis compares the impact of two distinct thiols on bottom-contact pentacene FETs: perfluorodecanethiol (PFDT) and pentafluorobenzenethiol (PFBT). Using X-ray photoelectron spectroscopy to measure metal oxidation, it was determined that short aromatic thiols are poor choices for low work-function metal passivation. In addition, both passivation and charge injection enhancement can be achieved with long fluorinated alkanethiols. However, there is a trade-off between passivation and on-current. The enhancement of on-current in thiol-treated Cu-electrode pentacene devices is most likely not morphology related, due to the fact that PFDT was found to be in a standing-up orientation on the metal surface. Additionally, it was demonstrated that although highly electronegative atoms such as fluorine can beneficially modify metal work function, too many fluorine atoms in thiols can lead to too high a work function and a large mismatch between the pentacene highest-occupied-molecular-level and metal work function.
42

Fabrication and characterization of metallophthalocyanine-based organic thin-film transistors.

January 2008 (has links)
Yu, Xiaojiang. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2008. / Includes bibliographical references. / Abstracts in English and Chinese. / ABSTRACT (ENGLISH) --- p.I / ABSTRACT (CHINESE) --- p.III / ACKNOWLEDGEMENTS --- p.IV / TABLE OF CONTENTS --- p.V / Chapter 1. --- Overview of organic thin-film transistors (OTFTs) --- p.1 / Chapter 1.1 --- Introduction to OTFTs --- p.1 / Chapter 1.2 --- Basic mechanism of OTFTs --- p.4 / Chapter 1.3 --- Applications of OTFTs --- p.6 / Chapter 1.3.1 --- Driving of circuits for electronic papers and LCD --- p.6 / Chapter 1.3.2 --- Light-emitting OTFTs --- p.8 / Chapter 1.3.3 --- Sensing --- p.9 / Chapter 1.4 --- Several key issues --- p.9 / Chapter 1.4.1 --- Mobilities of OTFTs --- p.9 / Chapter 1.4.2 --- Performance of bottom-contact OTFTs --- p.10 / Chapter 1.4.3 --- Stability of OTFTs --- p.11 / Chapter 1.4.4 --- Performance of n-type organic semiconductors --- p.13 / Chapter 1.5 --- Why to study metallophthalocyanine-based OTFTs --- p.14 / Chapter 1.6 --- Objective of this thesis --- p.17 / References --- p.17 / Chapter 2. --- Experimental details for fabrication and characterization of OTFTs --- p.22 / Chapter 2.1 --- Purification of organic semiconductors --- p.22 / Chapter 2.2 --- Preparation of the gate dielectrics for OTFTs --- p.24 / Chapter 2.3 --- Deposition of organic thin films and gold source/drain electrodes --- p.26 / Chapter 2.4 --- Process flow for the fabrication of OTFTs --- p.27 / Chapter 2.5 --- Mobility measurement for the organic thin films --- p.28 / Chapter 2.6 --- Characterization of organic thin films --- p.31 / References --- p.31 / Chapter 3. --- Optimizing the growth of VOPc thin films for high-mobility OTFTs --- p.33 / Chapter 3.1 --- Experimental --- p.33 / Chapter 3.2 --- Results and discussion --- p.34 / Chapter 3.2.1 --- Growth of VOPc thin films on Si02 dielectric --- p.34 / Chapter 3.2.2 --- Growth of VOPc thin films on Ta205 and Al203/Si02 dielectrics --- p.41 / Chapter 3.4 --- Conclusion --- p.44 / References --- p.45 / Chapter 4. --- CuPc/CoPc and VOPc/CoPc p-type/p-type heterostructure OTFTs --- p.46 / Chapter 4.1 --- CuPc/CoPc OTFTs in sandwich configuration --- p.47 / Chapter 4.1.1 --- Experimental --- p.47 / Chapter 4.1.2 --- Results and discussion --- p.48 / Chapter 4.1.3 --- Conclusion --- p.57 / Chapter 4.2 --- VOPc/CoPc OTFTs --- p.57 / Chapter 4.2.1 --- Experimental --- p.57 / Chapter 4.2.2 --- Results and discussion --- p.58 / Chapter 4.2.3 --- Conclusion --- p.63 / References --- p.64 / Chapter 5. --- VOPc/F16CuPc p-type/n-type heterostructure OTFTs --- p.66 / Chapter 5.1 --- Unipolar VOPc/F16CuPc OTFTs --- p.67 / Chapter 5.1.1 --- Experimental --- p.67 / Chapter 5.1.2 --- Results and discussion --- p.69 / Chapter 5.1.3 --- Conclusion --- p.73 / Chapter 5.2 --- VOPc/F16CuPc heterostructure for bottom-contact OTFTs --- p.74 / Chapter 5.2.1 --- Experimental --- p.74 / Chapter 5.2.2 --- Results and discussion --- p.74 / Chapter 5.2.3 --- Conclusion --- p.77 / References --- p.77 / Chapter 6. --- Summary and future work --- p.80 / Summary --- p.80 / Future work --- p.81 / References --- p.83 / Appendix A: Capacitance-voltage (C-V) fitting for ITO/organic junction/AI devices --- p.85 / Appendix B: Can electric-filed influence the growth of organic thin films? --- p.89 / Appendix C: Micro-Raman study on organic thin films --- p.93 / Appendix D: Publications which contributed to this thesis --- p.97
43

Layout dependent and bias independent scalable substrate model for RF MOSFETs

Suravarapu, Ravikanth 07 January 2003 (has links)
The dependence of the substrate resistance, R[subscript sub], for MOS transistor RF modeling on transistor biasing and layout is studied from device simulations and measurements. Though R[subscript sub] is found to be bias dependent, the error incurred by assuming a constant value equal to the DC resistance is not significant. A scalable model for R[subscript sub] of multiple gate fingers is developed. This model is simple to extract and gives good agreement for the output admittance of a MOSFET. The model is validated by measurements on DC test structures fabricated in a TSMC 0.35 ��m CMOS process. The dependence of Rb on transistor dimensions and the location of substrate contacts with respect to device active area is also presented. A low noise amplifier (LNA) is designed and fabricated in the 0.35 ��m TSMC process to show the effect of R[subscript sub] on the performance of a LNA. / Graduation date: 2003
44

Design, fabrication and characterization of complementary heterojunction field effect transistors

McMahon, Terry E. (Terry Edwin), 1963- 10 June 1994 (has links)
Complementary delta-doped AlGaAs/GaAs Heterojunction Field Effect Transistor (CHFET) devices and circuits were fabricated using MBE and a 2�� non-planar gate recess process. Several schemes were used in an attempt to improve the performance of the p-channel HFETs. These included delta-doping, carbon-doping and dipole-doping. Circuits and individual n- and p- channel devices were fabricated on a stacked delta-doped complementary structure. The circuits failed to perform due to complications with adjusting the threshold voltage. However, Individual devices were successfully characterized, p-channel devices with extrinsic transconductances up to 14 mS/mm, n-channel devices with extrinsic transconductances up to 120 mS/mm and a unity power gain bandwidth of 5.5 GHz. / Graduation date: 1995
45

Design, fabrication and characterization of a complementary GaAs MODFET structure

Dang, Yen 14 October 1993 (has links)
Graduation date: 1994
46

HEMT-compatible laser diodes

Eliason, Garth W. 10 March 1994 (has links)
Graduation date: 1994
47

Physics and technology of high mobility, strained germanium channel, heterostructure MOSFETs

Krishnamohan, Tejas. January 2006 (has links) (PDF)
Thesis (Ph.D.)--Stanford University, 2006. / Adviser: Krishna C. Saraswat. Includes bibliographical references (p. 160-177)
48

Semiclassical Monte Carlo simulation of nano-scaled semiconductor devices

28 August 2008 (has links)
Not available
49

Processing and characterization of advanced AlGaN/GaN heterojunction effect transistors

Lee, Jaesun, January 2006 (has links)
Thesis (Ph. D.)--Ohio State University, 2006. / Title from first page of PDF file. Includes bibliographical references (p. 159-164).
50

Modeling 1/f noise in a-Si:H field-effect transistors

Xu, Yang 17 October 2008
Hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) are used as switching elements in large area active matrix liquid crystal displays and various image sensing devices for radiation detection. The noise inherent in the a-Si:H TFTs contributes to the overall noise figure of such devices and degrades the signal to noise ratio; therefore, the noise is an important factor in the design of the devices. The noise of the a-Si:H TFTs has been studied experimentally, but the origin of the noise is not understood. <p> This work calculates the noise of the a-Si:H TFTs based on a simulation of operation of the TFTs and the hypothesis that the device noise is due to the intrinsic noise of the a-Si:H material. An a-Si:H TFT with an inverted-staggered structure has been simulated by numerically solving the fundamental transport equations for various gate and drain-source voltages. The drain-source curves derived from the simulation agree qualitatively with the experimental results: both the linear and saturated regions are observed. The low frequency noise was calculated based on the charge density distribution in the channel obtained from the simulation and the known dependence of the noise in the a-Si:H on the charge density, Hooges relation. The calculated noise power increases with the drain-source voltage and is inversely proportional to the gate voltage or the effective channel length. The curves agree qualitatively with the experimental results. The calculated noise power agrees quantitatively with the experiments when the scaling parameter in Hooges relation, , is set to . This value agrees with the experimentally determined value for a-Si:H. The results are consistent with the hypothesis that the low frequency noise in the a-Si:H TFTs is due to the material itself.

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