A novel gate driver design is proposed to improve the conversion efficiency of DC-DC converters. Conventional gate drivers provide a fixed gate driving strength (capability) over the entire output load range. However, it is demonstrated that to optimize the overall conversion efficiency, the driving capability of the gate driver circuit should be adjusted according to the loading condition. The proposed segmented gate driver consists of 8 parallel driver segments that can be turned on/off allowing the power consumption of the gate driver circuit to be dynamically adjusted. The post layout simulation results in high voltage TSMC 0.25µm CMOS process shows that up to 7% improvement in the efficiency can be achieved. Furthermore, in addition to efficiency improvements, a 60% reduction in the ringing and overshoot/undershoot was observed. An integrated segmented gate driver IC designed for AMSP35HV process was submitted for fabrication with the support from CMC.

A novel gate driver design is proposed to improve the conversion efficiency of DC-DC converters. Conventional gate drivers provide a fixed gate driving strength (capability) over the entire output load range. However, it is demonstrated that to optimize the overall conversion efficiency, the driving capability of the gate driver circuit should be adjusted according to the loading condition. The proposed segmented gate driver consists of 8 parallel driver segments that can be turned on/off allowing the power consumption of the gate driver circuit to be dynamically adjusted. The post layout simulation results in high voltage TSMC 0.25µm CMOS process shows that up to 7% improvement in the efficiency can be achieved. Furthermore, in addition to efficiency improvements, a 60% reduction in the ringing and overshoot/undershoot was observed. An integrated segmented gate driver IC designed for AMSP35HV process was submitted for fabrication with the support from CMC.

There are many types of power sources that are used for many different applications. In this thesis, a programmable source is designed, built and tested. The programmable source is able to generate three-phase output signals from three different input voltage signals using the ADMC401 DSP board. The programmable source is unique in that it can reproduce any input signal and amplify the input signal. This is done by pulse-width modulation (PWM). The programmable source was designed with gate driver circuits, a motor controller, switches, filters, comparators and other electronic components. Thermal protection and applications for this programmable source are presented in this thesis. Also, test data taken when a squirrel cage induction motor was powered by the programmable source is presented.

As is predicted by Moore’s law, the transistors in microprocessors increase dramatically. In order to increase the power density of the microprocessors, the switching frequency of the Voltage Regulator (VR) is expected to increase to MHz level. However, the frequency dependent loss will increase proportionally. In order to meet requirements of the next-generation microprocessors, three new ideas are proposed in this thesis. The first contribution is a new bipolar Current Source Driver (CSD) for high frequency power MOSFET. The proposed CSD alleviates the gate current diversion problem of the existing CSDs by clamping the gate voltage to a flexible negative value during turn off transition. Therefore, the proposed driver turns off the MOSFET much faster. For buck converters with 12 V input at 1MHz switching frequency, the proposed driver improves the efficiency from 80.5% using the existing CSD to 82.5% at 1.2V/30A, and at 1.3V/30A output, from 82.5% to 83.9%. The second contribution is an accurate analytical loss model of a power MOSFET with a CSD. The current diversion problem that commonly exists in CSDs is investigated mathematically. The inductor value of the CSD is optimized to achieve minimum loss for the synchronous buck converter. The experimentally measured loss matches the calculated loss very well. The efficiency with the optimal CSD inductor is improved from 86.1% to 87.6% at 12V input, 1.3V/20A output in 1MHz switching frequency and from 82.4% to 84.0% at 1.3V/30A output. The third contribution is a new inductorless bipolar gate driver for control FET of buck converters. The most important advantage of the driver presented in this thesis is that it can turn off the power MOSFETs with a negative voltage, which will significantly reduce the turn off time and thus switching loss. In addition, the proposed bipolar gate driver has no inductor in the driver circuit; therefore it can be fully integrated into a chip. For buck converter with 5V input, 1.3V/25A load, in 2 MHz frequency, the proposed gate driver increases the efficiency from 75.8% to 77.8% and from 72.9% to 76.5% at 5V input, 1.3V/25A load, in 2.5 MHz switching frequency. / Thesis (Master, Electrical & Computer Engineering) -- Queen's University, 2010-07-30 14:06:04.003

Le projet de thèse s'inscrit dans le consortium industriel académique MEGAN (More Electric Gallium Nitride) réunissant de nombreux industriels français, grands groupes et PME (Renault, Schneider Electric, Safran, IDMOS, Valeo...) et académiques (G2Elab, Ampère, SATIE...) et le CEA. Le projet consiste à introduire de nouvelles technologies de composants de puissance à base de matériaux en GaN afin d'augmenter les performances des convertisseurs statiques pour divers types d'applications. La thèse est intégralement focalisée sur la partie Driver intégré de composants GaN à base d'une technologie CMOS SOI XFAB XT018 pour favoriser l'utilisation des systèmes à haute fréquence et haute température. La thèse consiste à étudier des architectures des drivers et des fonctionnalités innovantes permettant de limiter les problèmes inhérents à la haute fréquence et la haute température (Compatibilité ÉlectroMagnétique- CEM, pertes de commande par courant de fuites, limites fonctionnelles...). Suite à l'étude des architectures à l'échelle du bras d'onduleur à base de composants discrets, un circuit intégré est conçu en collaboration avec les partenaires du projet. Le circuit intégré est alors réalisé avant d'être caractérisé puis mis en œuvre dans des démonstrateurs dans le cadre du projet. En particulier, des caractéristiques de réponses en fréquence et de tenue en température seront proposées. La mise en œuvre est conduite au sein même du module de puissance intégrant les composants de puissance en GaN, au plus près de ceux-ci pour favoriser les fonctionnements à haute fréquence. Le démonstrateur final peut servir plusieurs types d'applications de part sa versatilité. Le travail de thèse est alors plus spécifiquement orienté sur l'étude du comportement haute fréquence du driver et de l'ensemble interrupteurs avec fortes vitesses de commutation / drivers d’un bras d'onduleur. / This Ph.D work is part of the industrial academic project MEGaN (More Electric Gallium Nitride) involving many French companies (Renault, Schneider Electric, Safran, ID MOS, Valeo, ...), academic institutions (G2Elab, Ampere, SATIE ...) and CEA. MEGaN project aims are to introduce a new technology of the power components based on GaN materials, to increase the performance of the static converters for various applications.This research is highly focused on the integrated driver and other power device peripheral units for GaN-based components. This is done in SOI CMOS XFAB XT018 technology to promote performing in high-frequency and high temperature applications. It involves examining driver's architectures and features, innovative methods to limit problems inherent in high frequency and high temperature (conducted EMI perturbation, delay mismatch, functional limitations ...). After studying the architecture at the scale of the discrete circuits, the integrated circuits are designed in collaboration with the project partners. The integrated circuit is manufactured by foundry XFAB before being characterized and implemented.In particular, the characteristics at high frequency response and high temperature compliance are proposed. The final implementation is conducted in the hybrid power module power with the power components GaN, as close as possible to those for operation at high frequency which is presented in the end of this thesis. The final demonstrator serves several kinds of applications because of its versatility. The thesis is specifically focused on the study of high frequency behavior of the driver and power switches with high switching speed / the driver’s components of an inverter leg.

A gate driver IC with programmable driving strength to reduce electromagnetic interference (EMI) in SMPS is presented in this thesis. The design builds on previous segmented gate driver designs that have been used to improve light load efficiency. The presented solution is to dynamically adjust the output resistance Rout at the arrival of each gate pulse to minimize EMI while maintaining low switching loss. Dynamically adjusting Rout is not possible with conventional gate driver designs. Thus, a segmented gate driver is designed and fabricated in the AMS 0.35μm 40V HVCMOS process. Unlike traditional snubber circuits, the proposed method does not require extra discrete components that dissipate energy. Experimental results indicate up to a 7dBμV improvement in peak Conducted EMI (CEMI) between 20 MHz and 30 MHz and a 150μV/m improvement in peak Radiated EMI (REMI) between 88 MHz and 216 MHz.

A gate driver IC with programmable driving strength to reduce electromagnetic interference (EMI) in SMPS is presented in this thesis. The design builds on previous segmented gate driver designs that have been used to improve light load efficiency. The presented solution is to dynamically adjust the output resistance Rout at the arrival of each gate pulse to minimize EMI while maintaining low switching loss. Dynamically adjusting Rout is not possible with conventional gate driver designs. Thus, a segmented gate driver is designed and fabricated in the AMS 0.35μm 40V HVCMOS process. Unlike traditional snubber circuits, the proposed method does not require extra discrete components that dissipate energy. Experimental results indicate up to a 7dBμV improvement in peak Conducted EMI (CEMI) between 20 MHz and 30 MHz and a 150μV/m improvement in peak Radiated EMI (REMI) between 88 MHz and 216 MHz.

The increasing market demand for wideband gap (WBG) power switches has led to heightened competition to increase converter power density, switching frequencies, and reduce form factor, among other factors. However, this technology has also brought about an increase in encounters with electromagnetic interference (EMI), posing significant challenges. Nevertheless, the maturation of power switches has been accompanied by an improvement in gate drive technology aimed at resolving EMI challenges, albeit at a higher component and cost expense. This thesis aims to design, analyze, and implement a recent innovative differential gate driver for a 1.2 kV SiC MOSFET full bridge module. The purpose of this design is to mitigate EMI, improve performance, and reduce the number of filtering elements that are typically required. The investigation into the impact of EMI on electrical systems involves exploring factors such as testing equipment, power supplies, and gate drive layout. Based on these considerations, system and sub-system level analyses are conducted to derive practical design recommendations for implementing the differential gate driver. Three gate drive PCBs are designed and evaluated through extensive double pulse tests (DPTs). Furthermore, continuous switching of the driver presents its own set of challenges that are not apparent during the DPTs, requiring further exploration of low-cost solutions. Finally, a comparison between custom and discrete module solutions employing 1.2 kV SiC MOSFETs is conducted, highlighting the advantages and disadvantages of each approach. The solutions proposed in this work are intended to be extended to other gate drive ICs, with the goal of providing valuable insights and guidelines for EMI suppression and gate driver performance enhancement. / Master of Science / The increasing demand for powerful and efficient electronic devices has led to competition to develop better converters with wideband gap (WBG) power switches. These switches can make electronics work faster and take up less space, but they can also cause electromagnetic interference (EMI) that can be problematic. Despite these challenges, advances in power switch technology have led to improvements in gate drive technology, which can help reduce EMI, albeit, sometimes, at a higher cost. This research aims to design and analyze an innovative differential gate driver for a 1.2 kV SiC MOSFET full bridge module that can help mitigate EMI, improve performance, and reduce the number of required filtering elements. A system-level analysis is conducted to identify critical noise paths and potential solutions in response to poor gate driver performance. Practical design recommendations are provided for implementing a differential gate driver, and three PCB designs are tested and evaluated to showcase the effectiveness of the proposed solutions. The work also includes a comparison between a custom module and discrete module solutions employing 1.2 kV SiC MOSFETs, highlighting the advantages and disadvantages of each approach. The findings are extended to other gate drivers that share similar performance specifications, demonstrating the potential and improvements that can be achieved with the suggested techniques. Overall, the study provides valuable insights and guidelines for EMI suppression and performance enhancement in power electronics systems utilizing differential gate drivers.

With the development and use of Silicon-Carbide [Silicon-Carbide (SiC)] devices come a host of advantages, including higher switching frequency, improved thermal performance, and higher voltage rating. This higher switching frequency can reduce the size of the con- verter system, but is typically associated with higher dv/dt voltage slew rates that further increase electromagnetic interference (EMI) related phenomena. Conventional gate-drivers are very limited in the way that they can control this high dv/dt, and this leads to the use of active gate-drivers. This thesis will explore the use of an active voltage-controlled gate-driver for SiC devices, utilizing transiently a voltage closer to the Miller plateau than the nominal turn-on and turn-off voltage to introduce control over the switching transient. Various ap- plied voltages, and voltage sequences will be evaluated to determine their effectiveness for controlling dv/dt and their impact on switching loss. Through this work, a better under- standing of the advantages and drawbacks of an active gate-driver can be found. The main result from this work is the effective reduction in the dv/dt generated by MOSFET devices, which was attained at a lower switching loss penalty compared to conventional resistive gate-drivers operating at similar dv/dt rates. Simulation and experimental results obtained with a prototype active gate-driver circuitry were used for this evaluation. / Master of Science / Within power electronic systems such as an inverter used to connect solar panels to the grid, are electrically controlled switches. These switches traditionally have been made of Silicon (Si) which imposed limitations on how fast they could transition from off to on, and vice versa, they also could only switch a relatively small number of times per second. However, a new generation of devices made from a silicon carbide material are being increasingly adopted, some key advantages of these new devices include much higher number of times to switch per second, and faster transitions from off-on and on-off. The trade-off that comes with this faster operation is an increase in the electromagnetic noise generated by these switches, among other issues. This work looks to explore a more unique method of controlling the turn-on and turn-off of these new switches and evaluating its impact on the noise generated and the losses during switching.

Le mémoire de thèse est structuré en 3 chapitres. Le 1er chapitre présente le contexte de forte vitesse de commutation et de forte intégration en électronique de puissance, dans lequel s’inscrit cette thèse. Les fonctions et les enjeux de l’organe de commande rapprochée (« gate driver ») sont présentés. L’intégration du gate driver en technologie CMOS AMS 0.18 µm HV est présentée puis, plus particulièrement, l’intégration des fonctions optiques. Le 2e chapitre concerne l’étude de la transmission et de la modulation des charges à travers la barrière d’isolation optique. Un amplificateur en courant configurable a été dimensionné afin de pouvoir faire varier la résistance de grille. Une alimentation optique est intégrée en technologie AMS H18, comprenant une cellule PV et un convertisseur DC/DC à capacités commutées. Dans le 3e chapitre, 2 approches ont été développées pour la transmission du signal, la transmission dite en bande de base où les ordres de commande optiques sont l’image directe de la modulation en largeur d’impulsion (MLI), et la transmission dite numérique série où les changements d’état sont envoyés avec une trame haute fréquence. Un circuit de gestion logique et une horloge interne ont été conçus. La transmission numérique permet l’envoi d’information telle que la configuration de la résistance de grille. Le dimensionnement des circuits prend en compte une large plage de température de fonctionnement (-40°C à 140 °C), ainsi que les contraintes dues à l’alimentation optique (variation de la tension d’alimentation) et à l’alignement optique (variation du photo-courant généré). / The thesis dissertation is composed of 3 chapters. The 1st chapter introduces the thesis context of fast switching transients and highly integrated power electronics circuits. The functions and the issues of the close gate driver are presented. The gate driver is integrated in the AMS 0.18 µm technology with its optical functions. The second chapter deals with the transmission and modulation of the gate driver charge through the optical isolation barrier. A configurable buffer is designed in order to modulate the gate resistance value. An optical supply including a PV cell and a switched capacitors DC/DC converter is integrated. In the third chapter, two approaches are developed for the gate signal transfer. For the baseband analog transmission, the optical signal is a direct image of the pulse width modulation (PWM) signal whereas in the digital series transmission, only the commutation orders are transmitted in a high frequency frame. A logic circuit and an integrated clock are designed. The digital transmission allowed the transfer of information such as the gate resistance configuration. Large temperature range (-40°C to 140°C), optical supply constraints (supply voltage deviation) and optical alignment (photocurrent value deviation) are considered for the integrated circuits design.