京都大学 / 新制・課程博士 / 博士(情報学) / 甲第24747号 / 情博第835号 / 新制||情||140(附属図書館) / 京都大学大学院情報学研究科通信情報システム専攻 / (主査)教授 佐藤 高史, 教授 橋本 昌宜, 教授 新津 葵一 / 学位規則第4条第1項該当 / Doctor of Informatics / Kyoto University / DFAM

The increasing market demand for wideband gap (WBG) power switches has led to heightened competition to increase converter power density, switching frequencies, and reduce form factor, among other factors. However, this technology has also brought about an increase in encounters with electromagnetic interference (EMI), posing significant challenges. Nevertheless, the maturation of power switches has been accompanied by an improvement in gate drive technology aimed at resolving EMI challenges, albeit at a higher component and cost expense. This thesis aims to design, analyze, and implement a recent innovative differential gate driver for a 1.2 kV SiC MOSFET full bridge module. The purpose of this design is to mitigate EMI, improve performance, and reduce the number of filtering elements that are typically required. The investigation into the impact of EMI on electrical systems involves exploring factors such as testing equipment, power supplies, and gate drive layout. Based on these considerations, system and sub-system level analyses are conducted to derive practical design recommendations for implementing the differential gate driver. Three gate drive PCBs are designed and evaluated through extensive double pulse tests (DPTs). Furthermore, continuous switching of the driver presents its own set of challenges that are not apparent during the DPTs, requiring further exploration of low-cost solutions. Finally, a comparison between custom and discrete module solutions employing 1.2 kV SiC MOSFETs is conducted, highlighting the advantages and disadvantages of each approach. The solutions proposed in this work are intended to be extended to other gate drive ICs, with the goal of providing valuable insights and guidelines for EMI suppression and gate driver performance enhancement. / Master of Science / The increasing demand for powerful and efficient electronic devices has led to competition to develop better converters with wideband gap (WBG) power switches. These switches can make electronics work faster and take up less space, but they can also cause electromagnetic interference (EMI) that can be problematic. Despite these challenges, advances in power switch technology have led to improvements in gate drive technology, which can help reduce EMI, albeit, sometimes, at a higher cost. This research aims to design and analyze an innovative differential gate driver for a 1.2 kV SiC MOSFET full bridge module that can help mitigate EMI, improve performance, and reduce the number of required filtering elements. A system-level analysis is conducted to identify critical noise paths and potential solutions in response to poor gate driver performance. Practical design recommendations are provided for implementing a differential gate driver, and three PCB designs are tested and evaluated to showcase the effectiveness of the proposed solutions. The work also includes a comparison between a custom module and discrete module solutions employing 1.2 kV SiC MOSFETs, highlighting the advantages and disadvantages of each approach. The findings are extended to other gate drivers that share similar performance specifications, demonstrating the potential and improvements that can be achieved with the suggested techniques. Overall, the study provides valuable insights and guidelines for EMI suppression and performance enhancement in power electronics systems utilizing differential gate drivers.

Medium Voltage (MV) power conversion systems are essential in high power applications to address the increasing demand of energy and the increasing penetration of renewable energy sources. MV power electronics converters are the key elements for power conversion in MV systems and are the focus of this study. Multilevel converter topologies are promising topologies in MV applications because of their reduced voltage stress on devices, excellent output quality, reduced semiconductor losses, lower common mode voltage among other advantages. However, they may suffer from the large number of switching devices and capacitors, as well as the need to regulate capacitor voltages. SiC MOSFETs can achieve higher switching speeds, higher switching frequencies, higher voltage ratings, higher operation temperatures compared to traditional Si devices. They have shown promise to increase the efficiency and power density of the converters, but may suffer from higher voltage overshoots, increased Electromagnetic Interference (EMI) emission and so on. In SiC-based multilevel converters, the features of multilevel topologies, and the features of SiC MOSFETs are coupled together. The benefits, challenges, and solutions of using SiC MOSFETs in multilevel converters are studied explicitly in this work. With the high switching speeds and high switching frequencies of SiC MOSFETs, and the large number of switches and capacitors in multilevel topologies, SiC-based multilevel converters need to be studied while considering high-frequency voltage and current behaviors and the interactions among them at different locations. Firstly, the use of SiC-based multilevel converter in the high-speed motor drive application is explored. A three-phase inverter is designed and built employing five-level Stacked Multicell Converter topology and SiC MOSFETs. The benefits and challenges of using multilevel converter topology and using SiC MOSFETs for this application are explored. A fitting topology is selected, and a prototype is designed, both with attentions paid to deal with the high switching speeds of SiC MOSFETs. The inverter is verified through experiments to meet all specifications with a high efficiency. Then a unique type of converter, converters with Integrated Capacitor Blocked Transistor (ICBT) cells are studied. Unlike the traditional methods, there are no fast-developing voltage unbalances, or high cell capacitor voltage ripples in ICBT-based converters. The ideal operation principle is analyzed and verified by the simulation results. Then the impacts of non-idealities on the operation are analyzed, and a control method is proposed for this type of converter. The operation and control of ICBT-based converters are verified by experimental results to achieve low cell capacitor voltage ripples and excellent voltage balance in Medium Voltage high power applications. Lastly, the conducted EMI emission in SiC-based multilevel converters are studied. Four SiC-based multilevel converters are studied, with the focus on the power circuit in one converter and the auxiliary circuits in the other three converters. The complexity of noise generation and propagation in multilevel converters is presented. The conducted EMI disturbances are experimentally evaluated, analyzed, and effectively mitigated in all four cases. / Doctor of Philosophy / Medium Voltage (MV) power conversion systems are essential in high power applications to address the increasing demand of energy and the increasing penetration of renewable energy sources. MV power electronics converters are the key elements for power conversion in MV systems and are the focus of this study. Multilevel converter topologies are promising topologies in MV applications because of their reduced voltage stress on devices, excellent output quality, reduced semiconductor losses, lower common mode voltage among other advantages. However, they may suffer from the large number of switching devices and capacitors, as well as the need to regulate capacitor voltages. SiC MOSFETs can achieve higher switching speeds, higher switching frequencies, higher voltage ratings, higher operation temperatures compared to traditional Si devices. They have shown promise to increase the efficiency and power density of the converters, but may suffer from higher voltage overshoots, increased Electromagnetic Interference (EMI) emission and so on. In SiC-based multilevel converters, the features of multilevel topologies, and the features of SiC MOSFETs are coupled together. The benefits, challenges, and solutions of using SiC MOSFETs in multilevel converters are studied explicitly in this work. With the high switching speeds and high switching frequencies of SiC MOSFETs, and the large number of switches and capacitors in multilevel topologies, SiC-based multilevel converters need to be studied while considering high-frequency voltage and current behaviors and the interactions among them at different locations. Firstly, the use of SiC-based multilevel converter in the high-speed motor drive application is explored. A three-phase inverter is designed and built employing five-level Stacked Multicell Converter topology and SiC MOSFETs. The benefits and challenges of using multilevel converter topology and using SiC MOSFETs for this application are explored. A fitting topology is selected, and a prototype is designed, both with attentions paid to deal with the high switching speeds of SiC MOSFETs. The inverter is verified through experiments to meet all specifications with a high efficiency. Then a unique type of converter, converters with Integrated Capacitor Blocked Transistor (ICBT) cells are studied. Unlike the traditional methods, there are no fast-developing voltage unbalances, or high cell capacitor voltage ripples in ICBT-based converters. The ideal operation principle is analyzed and verified by the simulation results. Then the impacts of non-idealities on the operation are analyzed, and a control method is proposed for this type of converter. The operation and control of ICBT-based converters are verified by experimental results to achieve low cell capacitor voltage ripples and excellent voltage balance in Medium Voltage high power applications. Lastly, the conducted EMI emission in SiC-based multilevel converters are studied. Four SiC-based multilevel converters are studied, with the focus on the power circuit in one converter and the auxiliary circuits in the other three converters. The complexity of noise generation and propagation in multilevel converters is presented. The conducted EMI disturbances are experimentally evaluated, analyzed, and effectively mitigated in all four cases.

Wide-bandgap semiconductors have made and are continuing to make a major impact on the power electronics world. The most common commercially available wide-bandgap semiconductors for power electronics applications are SiC and GaN devices. This paper focuses on the newest devices emerging that are made with these wide-bandgap materials. The static and dynamic characterization of six different SiC MOSFETs from different manufacturers are presented. The static characterization consists of the output characteristics, transfer characteristics and device capacitances. High temperature (up to 150 °C) static characterization provides an insight into the dependence of threshold voltage and on-state resistance on temperature. The dynamic characterizations of the devices are conducted by performing the double-pulse test. The switching characteristics are also tested at high temperature, with the presented results putting an emphasis on one of the devices. A comparison of the key characterization results summarizes the performance of the different devices. The characterization of one of the SiC MOSFETs is then continued with a short-circuit failure mode operation test. The device is subjected to non-destructive and destructive pulses to see how the device behaves. The non-destructive tests include a look at the performance under different external gate resistances and drain-source voltages. It is found that as the external gate resistance is increased, the waveforms get noisier. Also, as the drain-source voltage is increased, the maximum short-circuit current level rises. The destructive tests find the amount of time that the device is able to withstand short-circuit operation. At room temperature the device is able to withstand 4.5 μs whereas at 100 °C, the device is able to withstand 4.2 μs. It is found that despite the different conditions that the device is tested at for destructive tests, the energy that they can withstand is similar. This paper also presents the static and dynamic characterization of a 600 V, 2A, normallyoff, vertical gallium-nitride (GaN) transistor. A description of the fabrication process and the setup used to test the device are presented. The fabricated vertical GaN transistor has a threshold voltage of 3.3 V, a breakdown voltage of 600 V, an on-resistance of 880 mΩ, switching speeds up to 97 V/ns, and turn-on and turn-off switching losses of 8.12 µJ and 3.04 µJ, respectively, demonstrating the great potential of this device / MS

abstract: Two major challenges in the transformer-less, single-phase PV string inverters are common mode leakage currents and double-line-frequency power decoupling. In the proposed doubly-grounded inverter topology with innovative active-power-decoupling approach, both of these issues are simultaneously addressed. The topology allows the PV negative terminal to be directly connected to the neutral, thereby eliminating the common-mode ground-currents. The decoupling capacitance requirement is minimized by a dynamically-variable dc-link with large voltage swing, allowing an all-film-capacitor implementation. Furthermore, the use of wide-bandgap devices enables the converter operation at higher switching frequency, resulting in smaller magnetic components. The operating principles, design and optimization, and control methods are explained in detail, and compared with other transformer-less, active-decoupling topologies. A 3 kVA, 100 kHz single-phase hardware prototype at 400 V dc nominal input and 240 V ac output has been developed using SiC MOSFETs with only 45 μF/1100 V dc-link capacitance. The proposed doubly-grounded topology is then extended for split-phase PV inverter application which results in significant reduction in both the peak and RMS values of the boost stage inductor current and allows for easy design of zero voltage transition. A topological enhancement involving T-type dc-ac stage is also developed which takes advantage of the three-level switching states with reduced voltage stress on the main switches, lower switching loss and almost halved inductor current ripple. In addition, this thesis also proposed two new schemes to improve the efficiency of conventional H-bridge inverter topology. The first scheme is to add an auxiliary zero-voltage-transition (ZVT) circuit to realize zero-voltage-switching (ZVS) for all the main switches and inherent zero-current-switching (ZCS) for the auxiliary switches. The advantages include the provision to implement zero state modulation schemes to decrease the inductor current THD, naturally adaptive auxiliary inductor current and elimination of need for large balancing capacitors. The second proposed scheme improves the system efficiency while still meeting a given THD requirement by implementing variable instantaneous switching frequency within a line frequency cycle. This scheme aims at minimizing the combined switching loss and inductor core loss by including different characteristics of the losses relative to the instantaneous switching frequency in the optimization process. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2017

Three growing power electronics applications have massive requirements for properly operating their medium-voltage and high-voltage systems: electric transportation, renewable energy, and the power grid. Their needs include dense power systems with higher efficiency and higher voltage and current devices. This requires devices with higher switching frequencies to lower the size of the passives in the converter and devices that can withstand higher operating temperatures as components move closer together to improve power densities. Devices that achieve higher switching speeds and lower specific on-state resistances also reduce losses. Wide bandgap devices (WBG) like silicon carbide (SiC) have a higher bandgap, higher electric field strength, higher thermal conductivity, and lower carrier concentration than silicon (Si). This allows for higher temperature operation, faster switching, higher voltage blocking, and lower power losses, directly meeting the requirements of the previously noted applications. However, the current packaging schemes are limiting the ability of SiC to operate in these applications by applying packaging schemes used for Si. Therefore, it is critical to use and refine advanced packaging techniques so that WBG devices can better operate and meet the growing demands of these power electronic applications. Low-inductance, wirebond-less, high-density, scalable modules are possible due to advanced packaging methods. While beneficial to the operation and design, these techniques introduce new challenges to the fabrication process. This requires refinement to improve the yield of sandwich-structure modules with wirebond-less interconnects. For this module, encapsulated, silver-sintered substrates reduce the peak electric field within the package, improving the partial discharge inception voltage to meet insulation requirements. It is essential to have a uniform bondline between the substrates to achieve all bond connections and improve reliability. Silver sintering is also used to attach the molybdenum (Mo) post interconnects. These interconnects allow for sandwich-structure modules with low inductances; however, they have tolerance variation from manufacturing and bondline thicknesses, which become problematic for multi-chip power modules with an increased number of die and posts. The variation results in tilt, causing some posts to disconnect altogether. Additionally, soldering MCPMs involves a large thermal mass that the soldering reflow profile from a datasheet does not account for. Ultimately, these fabrication concerns can result in misalignment or disconnected post interconnects to the top substrate. Post interconnect planarity and alignment are vital for this multi-chip power module to avoid open or shorted connections that can derate switch positions. This thesis aims to refine each packaging step in assembling a wirebond-less, multi-chip power module. The bond uniformity of silver (Ag) sintering is addressed in dried preform and wet paste cases. The soldering methods are explored and improved by creating a modified reflow profile for large thermal masses and introducing pressure to reduce bondline variation and voiding content. The entire sandwich structure module is analyzed in a statistical tolerance analysis to understand which component introduces the most variation and height mismatch, providing insight as to which packaging techniques need further control to improve the yield of multi-chip power modules. / Master of Science / The electrification of many systems worldwide has increased the need for compact, efficient power electronics. Their applications span electric transportation, renewable energy systems, grid applications, and data centers, to name a few medium-voltage applications. Wide bandgap (WBG) semiconductors can outperform silicon in these applications, offering higher temperature robustness, higher efficiency performance, and higher voltage capabilities. The faster switching will reduce the size and weight of the converters containing these devices. However, using typical packaging schemes such as wirebonds will limit the potential of WBG devices in these applications. Advanced packaging techniques have been developed to increase the electric field strength, reduce the power loop inductances, reduce electromagnetic interference from fast-switching transients, and improve the power densities of multi-chip power modules for medium voltage and current applications. However, these packaging techniques are not trivial to implement and have resulted in a low yield of these modules. This thesis aims to refine each packaging step in assembling a wirebond-less, multi-chip power module. The bond uniformity of silver sintering is addressed in cases of dried preform and wet paste. The soldering methods are explored and improved by creating a modified reflow profile for large thermal masses and introducing pressure to reduce bondline variation and voiding content. The entire sandwich structure module is analyzed in a statistical tolerance analysis to understand which component introduces the most variation and height mismatch, providing insight as to which packaging techniques need further control to improve the yield of multi-chip power modules.

The automotive sector finds itself undergoing a significant and substantial transformation, propelled by the pronounced proliferation of electric vehicles (EVs) and autonomous driving technologies. As the industry proactively adapts to embrace this, an increasingly pressing demand becomes evident for higher performance, reliability, sustainability, and speed. Semiconductor packages emerge as primary catalysts within this ongoing revolution, positioned squarely at the forefront to assume a critical and indispensable function in facilitating the realization of these fundamental objectives. Commercial vehicle manufacturers are taking steps to respond to these demands for sustainability and speed, the driving force in facilitating this being the shift from Si IGBTs to SiC MOSFETs. Silicon Carbide is an increasingly popular choice in inverter module fabrication for electric vehicle applications owing to its inherent characteristics such as reduced on resistance, higher blocking voltage, and higher temperature stability that enable high power density, increased efficiency, and speeds. This work focuses on developing and fabricating a high-density 1.7 kV, 300 A SiC MOSFET half-bridge power module tailored for a 280-320 kW, 2-level inverter configuration. Co-designed with the busbar and gate driver, the custom power module stresses efficient heat dissipation, minimized parasitic inductance, and a compact footprint. Key target parameters to achieve optimal performance include a Rdson below 20 mΩ, Rthjc under 0.2 K/W and a switching time below 20 ns. The proposed module features a double-sided cooling sandwiched structure, an integrated thermistor for health and degradation monitoring, and incorporates three Wolfspeed 3rd generation 1.7 kV, 18 mΩ devices per switch position. The simulated power loop inductance is 14.5 nH, the simulated parasitic resistance is 0.265 m, and the simulated junction-to-case thermal resistance is 0.12182 ℃/W. To keep the die temperature below 150 ℃, a cooling coefficient of 5500 W/m2 is necessary. / Master of Science / The automotive sector is in the midst of a major transformation, propelled by the noticeable spread of electric vehicles (EVs) and autonomous driving technologies. As the industry actively evolves to accommodate this, an increasingly pressing demand becomes apparent for higher performance, reliability, sustainability, and speed. Semiconductor packages are at the forefront of this transformation, playing a crucial role in achieving these goals. Commercial vehicle makers are taking steps to respond to these demands for sustainability and speed, the driving force for this being the shift from Si IGBTs to SiC MOSFETs. Silicon Carbide is an increasingly popular choice in inverter module fabrication for electric vehicle applications owing to its inherent characteristics such as reduced resistance, higher blocking voltage, and higher temperature stability that enable high power density, increased efficiency, and speeds. This study focuses on creating a compact and efficient power module for commercial electric vehicle applications. The designed module is capable of handling high power levels while remaining compact, thus prioritizing power density. This is carefully designed to ensure it cools down effectively, minimizes unnecessary energy losses, and has a small footprint. Certain key features, such as its commutation speed, current carrying capacity, and thermal and mechanical limitations, were also studied. A temperature sensor was incorporated to monitor its health and performance over time. Simulations were performed to validate that this module performs well in terms of its resistances in the electrical conduction path and the oath of heat dissipation.

Due to the limitations of silicon (Si), there is a paradigm shift in research focusing on wide-bandgap-based (WBG) materials. SiC power semiconductors exhibit superiority in terms of switching speed, higher breakdown electric field, and high working temperature, slowly becoming a global solution in harsh medium-voltage (MV) high-power environments. However, to utilize the SiC MOSFET device to achieve those next-generation, high-density, high-efficiency power electronics converters, one must solve a plethora of challenges. For the MV SiC MOSFET device, a high-performance gate-driver (GD) is a key component required to maximize the beneficial SiC MOSFET characteristics. GD units must overcome associated challenges of electro-magnetic interference (EMI) with regards to common-mode (CM) currents and cross-talk, low driving loop inductance required for fast switching, and device short-circuit (SC) protection. Developed GDs (for 1.2 kV, and 10 kV devices) are able to sustain dv/dt higher than 100 V/ns, have less than 5 nH gate loop inductance, and SC protection, turning off the device within 1.5 us. Even with the introduction of SiC MOSFETs, power devices remain the most reliability-critical component in the converter, due to large junction temperature (Tj) fluctuations causing accelerated wear-out. Real-time (online) measurement of the Tj can help improve long-term reliability by enabling active thermal control, monitoring, and prognostics. An online Tj estimation is accomplished by generating integrated intelligence on the GD level. The developed Tj sensor exhibits a maximum error less than 5 degrees Celsius, having excellent repeatability of 1.2 degrees Celsius. Additionally, degradation monitoring and an aging compensation scheme are discussed, in order to maintain the accuracy of the sensor throughout the device's lifetime. Since ultra high-voltage SiC MOSFET devices (20 kV) are impractical, the modular multilevel converter (MMC) emerged as a prospective topology to achieve MV power conversion. If the kernal part of the power-cell (main constitutive part of the MMC converter) is an SiC MOSFET, the design is able to achieve very high-density and high-efficiency. To ensure a successful operation of the power-cell, a systematic design and assessment methodology (DAM) is explored, based on the 10 kV SiC MOSFET power-cell. It simultaneously addresses challenges of high-voltage insulation, high dv/dt and EMI, component and system protections, as well as thermal management. The developed power-cell achieved high-power density of 11.9 kW/l, with measured peak efficiency of n=99.3 %@10 kHz. It successfully operated at Vdc=6 kV, I=84 A, fsw>5 kHz, Tj<150 degrees Celsius and had high switching speeds over 100 V/ns. Lastly, to achieve high-power density and high-efficiency on the MV converter level, challenges of high-voltage insulation, high-bandwidth control, EMI, and thermal management must be solved. Novel switching cycle control (SCC) and integrated capacitor blocked-transistor (ICBT) control methodologies were developed, overcoming the drawbacks of conventional MMC control. These novel types of control enable extreme reduction in passive component size, increase the efficiency, and can operate in dc/dc, dc/ac, mode, potentially opening the modular converter to applications in which it was not previously used. In order to explore the aforementioned benefits, a modular, scalable, 2-cell per arm, prototype MV converter based on the developed power-cell is constructed. The converter successfully operated at Vdc=12 kV, I=28 A, fsw=10 kHz, with high switching speeds, exhibiting high transient immunity in both SCC and ICBT. / Doctor of Philosophy / In medium-voltage applications, such as an electric grid interface in highly populated areas, a ship dc system, a motor drive, renewable energy, etc., land and space can be very limited and expensive. This requires the attributes of high-density, high-efficiency, and reliable distribution by a power electronics converter, whose central piece is the semiconductor device. With the recent breakthrough of SiC devices, these characteristics are obtainable, due to SiC inherent superiority over conventional Si devices. However, to achieve them, several challenges must be overcome and are tackled by this dissertation. Firstly, as a key component required to maximize the beneficial SiC MOSFET characteristics, it is of utmost importance that the high-performance gate-driver be immune to interference issues caused by fast switching and be able to protect the device against a short-circuit, thus increasing the reliability of the system. Secondly, to prevent accelerated degradation of the semiconductor devices due to high-temperature fluctuations, real-time (online) measurement of the Tj is developed on the gate-driver to help improve long-term reliability. Thirdly, to achieve medium-voltage high-power density, high-efficiency modular power conversion, a converter block (power-cell) is developed that simultaneously addresses the challenges of high-voltage insulation, high interference, component and system protections, and thermal management. Lastly, a full-scale medium-voltage modular converter is developed, exploiting the advantages of the fast commutation speed and high switching frequency offered by SiC, meanwhile exhibiting exceptional power density and efficiency.

The electric power system is undergoing a paradigm change on how electric energy is generated, transmitted, and delivered. Power electronics systems which can provide medium-voltage (MV) to high-voltage (HV) output (>13.8 kV ac, > 20 kV dc) with much faster dynamic response (> 10 kHz bandwidth) or high switching-frequency will enable new electronic energy network architectures, like MVDC power delivery, underground solid-state power substation (SSPS), and high-density power electronics building block (PEBB); help drive the levelized cost of electricity (LCOE) of renewable energy on par with conventional power generation; deliver precise and clean power to loads like high-speed electric motors; push the future power system toward 100% renewable energy and energy storage supplied. In the MV to HV area, the power conversion solution is dominated by silicon devices, like SCR, IGCT, and IGBT, which are slow in nature, posing significant switching losses and bulky auxiliary components like turn-on snubbers. Devices in series are required to reach higher voltage. High-frequency HV converter in two-level or three-level bridges running 20 kHz or higher in many emerging applications, like MVDC networks with high-frequency transformers and energy storage integration is hard to be built by silicon solutions. The emerging HV wide-bandgap (WBG) power semiconductors, e.g., 10 kV SiC MOSFETs offer higher blocking capability, faster and more efficient switching performances. This makes the high-frequency power conversion technology feasible for the MV area. To build a MV high-frequency power converter with high-power density, 10 kV SiC MOSFETs in series are required to reach >10 kV operation dc voltage as the single device rating is still limited by the semiconductor process and packaging capability. However, the knowledge of dynamic voltage sharing of high-speed HV SiC devices under high dv/dt rate and effective balancing methods are not fully explored. Both the voltage imbalance and the robust device voltage balancing control are not studied clearly in the existing literature. This dissertation evaluates the voltage imbalance of series-connected 10 kV SiC MOSFETs thoroughly. The parasitic capacitors connected with device terminals are found to be a unique factor for the voltage imbalance of series-connected SiC MOSFETs, which have a significant impact on the dv/dt of different devices based on the detailed analysis. The unbalanced dv/dt and the gate signal mismatch together result in the voltage imbalance of series-connected SiC MOSFETs and a set of new voltage balancing control methods are proposed. Passive capacitor compensation and closed-loop short pulse gate signal control are proposed to solve the voltage imbalance caused by the unbalanced dv/dt. Closed-loop gate delay time control is proposed to solve the voltage imbalance caused by the gate signal mismatch. Two gate driver prototypes are designed and verified for the proposed voltage balancing control methods. As the number of devices increases, the voltage balancing methods under the device-level will be complex and risky to coordinate. Therefore, the converter-level device voltage balancing methods are desired when over three devices are in stack. Therefore, this dissertation proposes to use the 3-level (3L) neutral-point-clamped (NPC) converter structure as a converter-level approach to simplify the voltage balancing control of series-connected SiC MOSFETs. A new modulation strategy is proposed to control the loss of clamping diodes, so compact MV SiC Schottky diodes can be selected to reduce the impact of extra components on the power density. Compared to the phase-leg with direct series-connected SiC MOSFETs, the phase-leg designed with the converter-level approach achieves similar power density, easier voltage balancing control, and better efficiency, which is attractive for both two and four devices in series connection. Finally, this dissertation studies the impact of series-connected 10 kV SiC MOSFETs on MV phase-leg volume reduction with the example of multi-level flying capacitor (FC) converters. The relation between the capacitances of FCs and the device voltage is studied and a new design procedure for FCs is developed to achieve minimum FC energy and regulate the maximum device voltage. With the design procedure, the total FC volumes of a 22 kV 5-level FC converter and a 22 kV 3-level FC converter with series-connected 10 kV SiC MOSFETs are calculated and compared. Series-connected 10 kV SiC MOSFETs are found to help significantly reduce the total FC volume (> 85 %). In summary, this dissertation demonstrates that the direct series connection of 10 kV SiC MOSFETs is a reliable solution for the MV converter design, and the converter-level approach is a better voltage balancing control method. This dissertation also presents a quantitative analysis of the volume reduction enabled by the series-connected 10 kV SiC MOSFETs in MV converter phase-leg design. / Doctor of Philosophy / Emerging industrial applications require medium voltage (MV) power converters. For existing MV converter solutions with Si IGBT, complex system structures are usually required, which affects the efficiency, power density, and cost of the system. For the design of MV converter, the recent 10 kV SiC MOSFET has the promising potential to improve efficiency and power density by adopting a simpler topology and fewer conversion stages. New design challenges also emerge with the new 10 kV SiC MOSFETs and one of them is the device voltage control during the operation. This dissertation mainly focuses on the voltage balancing control of series-connected 10 SiC MOSFETs, which is an attractive solution to build the MV converter phase-leg in a simple structure. Several voltage balance control methods are proposed and compared in this dissertation, which helps justify that the series-connected SiC MOSFET is a reliable approach for the MV converter design. In addition, this dissertation also analyzes the volume reduction enabled by the series-connected SiC MOSFETs with the example of a multi-level flying capacitor converter in dc-ac applications.

Due to the superior characteristics compared to its silicon (Si) counterpart, the wide bandgap (WBG) semiconductor enables next-generation power electronics systems with higher efficiency and higher power density. With higher blocking voltage available, WBG devices, especially the silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET), have been widely explored in various medium-voltage (MV) applications in both industry and academia. However, due to the high di/dt and high dv/dt during the switching transient, potential overcurrent, overvoltage, and gate failure can greatly reduce the reliability of implementing SiC MOSFETs in an MV system. By utilizing the parasitic inductance between the Kelvin- and the power-source terminal, a short-circuit (SC) and overload (OL) dual-protection scheme is proposed for overcurrent protection. A full design procedure and reliability analysis are given for SC circuit design. A novel OL circuit is proposed to protect OL faults at the gate-driver level. The protection procedure can detect an SC fault within 50 nanoseconds and protect the device within 1.1 microsecond. The proposed method is a simple and effective solution for the potential overcurrent problem of the SiC MOSFET. For SiC MOSFETs in series-connection, the unbalanced voltages can result in system failure due to device breakdown or unbalanced thermal stresses. By injecting current during the turn-off transient, an active dv/dt control method is used for voltage balancing. A 6 kV phase-leg using eight 1.7 kV SiC MOSFETs in series-connection has been tested with voltage balanced accurately. Modeling of the stacked SiC MOSFET with active dv/dt control is also done to summarize the design methodology for an effective and stable system. This method provides a low-loss and compact solution for overvoltage problems when MV SiC MOSFETs are connected in series. Furthermore, a scalable auxiliary power network is proposed to prevent gate failure caused by unstable gate voltage or EMI interference. The two-stage auxiliary power network (APN) architecture includes a wireless power transfer (WPT) converter supplied by a grounded low voltage dc bus, a high step-down-ratio (HSD) converter powered from dc-link capacitors, and a battery-based mini-UPS backup power supply. The auxiliary-power-only pre-charge and discharge circuits are also designed for a 6 kV power electronics building block (PEBB). The proposed architecture provides a general solution of a scalable and reliable auxiliary power network for the SiC-MOSFET-based MV converter. For the WPT converter, a multi-objective optimization on efficiency, EMI mitigation, and high voltage insulation capability have been proposed. Specifically, a series-series-CL topology is proposed for the WPT converter. With the optimization and new topology, a 120 W, 48 V to 48 V WPT converter has been tested to be a reliable part of the auxiliary power network. For the HSD converter, a novel unidirectional voltage-balancing circuit is proposed and connected in an interleaved manner, which provides a fully modular and scalable solution. A ``linear regulator + buck" solution is proposed to be an integrated on-board auxiliary power supply. A 6 kV to 45 V, 100 W converter prototype is built and tested to be another critical part of the auxiliary power network. / Doctor of Philosophy / The wide bandgap semiconductor enables next-generation power electronics systems with higher efficiency and higher power density which will reduce the space, weight, and cost for power supply and conversion systems, especially for renewable energy. However, by pushing the system voltage level higher to medium-voltage of tens of kilovolts, although the system has higher efficiency and simpler control, the reliability drops. This dissertation, therefore, focusing on solving the possible overcurrent, overvoltage, and gate failure issues of the power electronics system that is caused by the high voltage and high electromagnetic interference environment. By utilizing the inductance of the device, a dual-protection method is proposed to prevent the overcurrent problem. The overcurrent fault can be detected within tens of nanoseconds so that the device will not be destroyed because of the huge fault current. When multiple devices are connected in series to hold higher voltage, the voltage sharing between different devices becomes another issue. The proposed modeling and control method for series-connected devices can balance the shared voltage, and make the control system stable so that no overvoltage problem will happen due to the non-evenly distributed voltages. Besides the possible overcurrent and overvoltage problems, losing control of the devices due to the unreliable auxiliary power supply is another issue. This dissertation proposed a scalable auxiliary power network with high efficiency, high immunity to electromagnetic interference, and high reliability. In this network, a wireless power transfer converter is designed to provide enough insulation and isolation capability, while a switched capacitor converter is designed to transfer voltage from several kilovolts to tens of volts. With the proposed overcurrent protection method, voltage sharing control, and reliable auxiliary power network, systems utilizing medium-voltage wide-bandgap semiconductor will have higher reliability to be implemented for different applications.