Zugl.: München, Techn. Univ., Diss., 2008

Zugl.: Karlsruhe, Universiẗat, Diss., 2008.

The increase in solar energy installation capacity and the versatility of modern power inverters have enabled widespread penetration of distributed generation in modern power systems. Islanding detection techniques allow for fast identification and corrective action in the face of abnormal events. Current standards specify the operational limits for voltage, frequency, and detection time. Grid codes specify the procedures for disconnection to establish safe network maintenance conditions. Passive, active, and remote techniques require voltage, current, and frequency measurements and the definition of thresholds for detection. Operational parameters such as load mismatch and quality factors influence the detection capabilities. False-positive triggering due to grid transients can lead to unnecessary disconnection of distributed generation resources. Cybersecurity threats pose a critical challenge for power systems and can result in significant operational disruptions and security risks. In particular, when a power system initiates communication links between different nodes or ends, it becomes more vulnerable to various forms of cyber-attacks. As such, it is imperative to address the potential cybersecurity risks associated with communication links. Through a literature review, this work analyzes the performance of several islanding detection techniques and proposes a modified 9-bus benchmark system to verify the robustness of passive and active methods against false-positive detections upon severe grid-side transients. Furthermore, this thesis conducts a detailed analysis of cyber-attacks on the remote islanding detection technique, using a real-time simulator to assess the potential impact of such attacks on the technique's effectiveness by simulating various attack scenarios. The findings of this analysis can help power system operators to better protect their systems from cyber-attacks and ensure the reliable operation of their distributed generation resources. Moreover, it discusses a conceptual implementation of hardware-in-the-loop testing. The modeling of the systems is discussed. Guidelines and international standards are presented. Various setups for experimental work are suggested and implemented.

Many types of devices based on power converters have been proposed and studied for utility applications. In recent years most of the control systems for these converters have been digital. Unfortunately, such digital controllers, which are often based on a digital signal processor (DSP), are difficult to model in simulation. Thus, hardware prototypes are usually required. This thesis presents a tool for fast prototyping that helps overcome these difficulties. Namely, a hardware-in-the-loop simulation is provided for the digital controller in order to evaluate control algorithms without the voltage source converter and power system. The controller in the loop design methodology is described and the division between the real-time power system model and the hardware controller with an interface is shown. Also, the modulation type, integration time step selection and synchronization between the controller and the real-time system simulation are discussed. The hardware configuration for the real-time simulator and the software implementation of the simulator is discussed. In this thesis an example application of a shunt active compensator following this formal procedure is presented. The active compensator prototyping was first developed in MATLAB/Simulink. Then, following a formal design procedure, the power system was modeled in a digital simulator and the controller was implemented in a digital controller board. Finally, a hardware-in-the-loop test was carried out to validate the performance of the hardware controller for the active compensator. Although the tools and methods presented here are aimed at shunt connected current controller application, they may be generalized for use in the development of any digitally controlled power electronic converter.

Hardware-in-a-loop (HIL) testing and simulation for components and control strategies can reduce both time and cost of development. HIL testing focuses on one component or control system rather than the entire vehicle. The rest of the system is simulated by computer systems which use real time data acquisition systems to read outputs and respond like the systems in the actual vehicle would respond. The hardware for the system is on a scaled-down level to save both time and money during testing. The system designed to simulate the REVLSE Equinox split parallel hybrid consists of five direct current (DC) permanent magnet motors. These motors are used in the system to test the controller software of the vehicle. Two of the motors act as power plants simulating the spark ignited Ethanol engine and the rear traction motor. These two motors are controlled by DC variable speed controllers. The other motors are used as generators to simulate the load from the belted alternator starter (BAS) and the road load on each axle. The motors on each axle are joined together mechanically using a belt and pulley system. The front and rear axle of the system are not connected to simulate the actual vehicle where the power plants are gear-reduced before they make contact with the road and therefore do not actually spin at the same speeds. The computer software and hardware used to run the HIL hybrid system is National Instruments LabView and CompactRIO. LabView provides an easy interface through which programs for the RIO can be written. The RIO gives the user the ability to measure the power into and out of different components in the system to measure the efficiency of the system. The ability to measure system efficiencies using different powertrain inputs and loading schemes is what makes the HIL system a valuable tool in control modeling for the Equinox. LabView and the RIO allow the user to optimize the control strategy with the two power plant inputs and the BAS to make sure the high voltage system stays charged and improve the overall efficiency of the vehicle without the actual vehicle. The HIL system allows other work to be done of the vehicle during the control development. During a constant axle speed test at 730 RPM with constant generator resistance, the front engine efficiency was 33.8%, the BAS efficiency was 53.0%, the rear load generator efficiency was 51.2% and the overall efficiency of the front axle was 24.0%. These results show that the system can simulate the powertrain of a hybrid vehicle and help create and validate a control scheme. / Master of Science

This master thesis’s subject is to model an ABB contactor’s dynamics and to develop a hardware-in-the-loop simulation environment. The hardware-in-the-loop method utilizes computer models that are simulated in a real-time simulator. The real-time simulator is connected to hardware components. A contactor is an electrically controlled mechanical switching device and it is used in circuits where large currents can occur. In this thesis, the contactor is divided into three separate subsystems and models are developed for each of them. The three subsystems correspond to the contactor’s mechanics, electromagnetics and electronic components. Computer models are implemented in MATLAB and Simulink to realize the subsystems. The hardware part, of the hardware-in-the-loop simulations, consists of electronic parts that are not modeled. To connect the hardware part to a real-time simulator, from dSPACE, a hardware interface was constructed. This report focuses on the modeling of the mechanics and the electromagnetics as well as the software implementations. The thesis work was carried out in collaboration with another student. The focuses of his report are the modeling of the electronics and the construction of the hardware interface. Validation of the hardware-in-the-loop simulations is done by using measurements collected from a real contactor. The conclusion is that the simulations of the contactor’s behavior correspond well with a real contactor.

This thesis proposes and implements a flexible platform to perform Hardware-In-the-Loop (HIL) co-simulation using a Field-Programmable-Gate-Array (FPGA). The HIL simulations are performed with SystemModeler working as a software simulator and the FPGA as the co-simulator platform for the digital hardware design. The work presented in this thesis consists of the creation of: A communication library in the host computer, a system in the FPGA that allows implementation of different digital designs with varying architectures, and an interface between the host computer and the FPGA to transmit the data. The efficiency of the proposed system is studied with the implementation of two common digital hardware designs, a PID controller and a filter. The results of the HIL simulations of those two hardware designs are used to verify the platform and measure the timing and area performance of the proposed HIL platform.

Les convertisseurs statique à structure tension sont des éléments essentiels de nombreux systèmes d'électronique de puissance tels que les variateurs de vitesse des machines alternatives, les alimentations sans interruption et les filtres actifs. Les défaillances d’un convertisseur, qu’elles proviennent d’un des composants de puissance commandables ou d’un des capteurs mis en œuvre, conduisent à la perte du contrôle des courants de phase. Ces défaillances peuvent provoquer de graves dysfonctionnements du système, voire conduire à sa mise hors tension. Par conséquent, afin d'empêcher la propagation de défauts aux autres composants et assurer la continuité de service en présence de défaut, des méthodes efficaces et rapides de détection et de compensation de défauts doivent être mises en œuvre. Dans ces travaux de thèse nous avons étudié un convertisseur triphasé à structure tension "fault tolerant". Ce convertisseur assure la continuité de service, en mode normal, en présence de défauts éventuels d’un semi-conducteur ou d’un capteur de courant. Dans ces travaux, nous avons choisi comme cas d’application le filtre actif parallèle (FAP) triphasé afin de valider la continuité de service du convertisseur "fault tolerant" lors de défauts. Les résultats expérimentaux montrent les performances et l’efficacité du convertisseur "fault tolerant" proposé. Pour réduire autant que possible le temps de détection du défaut, nous avons ciblé un composant numérique de type FPGA (Field Programmable Gate Array). Nous avons également proposé dans ce mémoire un nouveau flot de conception et de prototypage dit "FPGA in the loop" qui permet de réduire le temps de développement. / Voltage source converters (VSC) are essential components of many power electronics systems such as variable speed AC machines, uninterrupted power supplies and active power filters. A sudden failure in one of the used power switches or the current sensors decreases system performances and leads to disconnect the system. Moreover, if the fault is not quickly detected and compensated, it can lead to hard failure. Hence, to reduce the failure rate and to prevent unscheduled shutdown, effective and fast fault detection and compensation schemes must be implemented. In this thesis work we have studied a fault tolerant VSC. This converter provides the continuity of service in the presence of a semiconductor or a current sensor fault. In this work, we have chosen the shunt active power filter application to validate the studied fault tolerant VSC performances. The experimental results confirms the satisfactory performances and efficiency of the proposed fault tolerant VSC. To minimize the fault detection time, we targeted a FPGA (Field Programmable Gate Array) component. We also proposed in this thesis a new methodology to design and prototype so-called “FPGA in the Loop” that will reduce development time of the digital controllers.

<p>Functionality in the automotive industry is becoming more complex, withcomplex communication networks between control systems. Information isshared among many control systems and extensive testing ensures high quality.</p><p>Degradations testing, that has the objective to test functionality with some faultpresent, is performed on single control systems, but is not frequently performed on the entire electrical system. There is a wish for testing degradation automatically on the complete electrical system in a so called Hardware-In-the-Loop laboratory.</p><p>A technique is needed to perform these tests on a regular basis.Problems with testing degradation in complex communication systems will bedescribed. Methods and solutions to tackle these problems are suggested, thatfinally end up with two independent test strategies. One strategy is suited to test degradation on new functionality. The other strategy is to investigate effects in the entire electrical system. Both strategies have been implemented in a Hardware-In-the-Loop laboratory and evaluated.</p>

Plug-in hybrid electric vehicles (PHEV) with all-electric range (AER) combine battery driven electric motors with traditional internal combustion engines in order to reduce emissions emitted to the atmosphere, especially during short, repetitive driving cycles such as commuting to work. A PHEV utilizes grid energy to recharge the electrical energy storage device for use in the AER operation. This study focuses on battery systems as the electrical energy storage device and evaluates commercially available technologies for PHEV through scaled hardware-in-loop (HIL) testing. This project has three main goals: determine the state of technology for PHEV batteries through an extensive literature review, characterize commercially available batteries including simulated HIL response to a real-world PHEV simulation model, and finally, develop a tool to aid in choosing battery types for different vehicle styles (a battery decision matrix). The five different battery types tested are as follows: A123 Lithium Iron Phosphate (LiFePO4) Li-Ion, Genesis Pure Lead-Tin lead acid, generic absorbed glass mat (AGM) valve regulated lead acid (VRLA), SAFT Nickel-Metal Hydride (NiMH) and SAFT Nickel-Cadmium (NiCd). The batteries were characterized in terms of capacity and maximum power as well as tested on an individually scaled real-world duty cycle derived from a model developed by the University of Manitoba and the University of Winnipeg. When comparing the results of the characterization testing with the literature review and manufacturers’ data it was found that there are discrepancies between the batteries tested and the manufacturers’ specifications for mass and capacity. Furthermore, the response to duty cycle testing shows that it is imperative that the internal resistance of the batteries and their conductors should be considered when designing a vehicle, although the literature suggest that this is not commonly done. The results from testing were incorporated into a simple decision matrix factoring in vehicle design constraints, battery performance and cost. Through the duty cycle testing, the dynamic resistance of each of the batteries was determined by measuring the voltage response of the battery to variations in current draw. This resistance figure is important to include in simulations as it effectively reduces available energy the battery can supply due to increasing current demands, as voltage drops in response to a load. / Thesis (Master, Mechanical and Materials Engineering) -- Queen's University, 2011-02-28 15:17:31.209