The objective of Master’s Thesis is to research the utilization of line optical sensors for object location´s and speed measurement in cooperation with PROTOTYPA company. At the beginning of the Thesis there is an explanation of CCD sensor components and photodiods working principals. Further are discussed particular methods of object sensing. There are schematics of different sensor locations and flying object. The other step deals with introduction to the question of ray impact on sensor in the way of using different light sources and optical systems. In the other part of the Thesis are presented two sensors, which have been chosen by PROTOTYPA company workers. Final part of the Thesis deals with description of executed experimental measurement with LCCD 2048S-14 type of sensor. Experiments are aimed for statical and dynamical processes. In statical part was checked displaying of fixed objects on CCD sensor in internal spaces on the assumption that changing of object-lens focalization, object´s high and shape. For the evaluation was used of MATLAB program. Dynamical part of measurement is aimed for moving objects.

This diploma thesis deals with an image capturing by a CMOS image sensor and controlling of graphical LCD displays using specialized integrated circuits. A theoretical research on the topic and design of the system designed for ease of processing, transmitting and still images displaying based on this research is described in this work. The output of the work is complete the device realized.

Color image acquisition and image processing have become a key in modern data application. In order to provide high quality images, the field of accurate acquisition is most important in respect to all further processing steps. But a whole variety of current image sensors possess incorrect color rendition due to insufficient accuracy of optical sensor parameters. This is detrimental especially for color sensors, because in these cases specific color information will be incorrectly acquired. Further, traditional color correction methods do not use information on the specific sensor spectral sensitivity, thus losing substantial information for color correction. The problem is investigated by introducing an algorithmic correction method which is capable of correcting dysfunctional sensor properties. The correction method is based on an enhancement of the CIE color perception model. According to this, color perception is modelled as a special integral transformation, where the spectral sensitivities of the photo receptors represent the base functions of the transformation. It is shown that different sets of photo receptors show the same perception, when their spectral sensitivities are linear dependent. On the other hand, photo receptors with no linear dependency show different perception and there is no analytical transformation between them. Thus, a perfect color correction is only possible if photo sensor and human perception show a linear dependency. In case of dissentient sensor characteristics, the correction method of spectral reconstruction can determine an optimal solution using a least square error optimization. Applying sensors with more than three color channels, this correction method can show improved results due to a better approximation. For implementation of the color correction scheme, different sensor designs have been developed. Compared with currently dominating CCD (Charge Coupled Device) technology, a realisation of image sensors based on CMOS technology show a high potential. CMOS technology allow the integration of the sensor together with control and image processing on the same chip, thus enabling the design of sensor systems at low cost. But modern sub-100nm technologies show also substantial disadvantages, such as increased leakage currents. Special circuit designs have been developed to especially reduce the influence of leakage currents. For application of the color correction method, new multi-channel photo sensors using vertically stacked photo diodes have been developed. The work further shows different concepts of multi-channel sensors capable of high quality color rendition. This approach is demonstrated on several new CMOS sensor designs with examples, implemented in a 90nm Infineon technology.

Star trackers are essential instruments commonly used on satellites. They provide precise measurement of the orientation of a satellite and are part of the attitude control system. For cubesats star trackers need to be small, consume low power and preferably cheap to manufacture. In this thesis work the electronics for a miniature star tracker has been developed. A star detection algorithm has been implemented in hardware logic, tested and verified. A platform for continued work is presented and future improvements of the current implementation are discussed. / Stjärnkameror är vanligt förekommande instrument på satelliter. De tillhandahåller information om satellitens orientering med mycket hög precision och är en viktig del i satellitens reglersystem. För kubsatelliter måste dessa vara små, strömsnåla och helst billiga att tillverka. I detta examensarbete har elektroniken för en sådan stjärnkamera utvecklats. En algoritm som detekterar stjärnor har implementerats i hårdvara, testats och verifierats. En hårdvaruplattform som fortsatt arbete kan utgå ifrån har skapats och förslag på förbättringar diskuteras.

Les capteurs d'images CMOS ont connu au cours des six dernières années une réduction de la taille des pixels d'un facteur quatre. Néanmoins, cette miniaturisation se heurte à la diminution rapide du signal maximal de chaque pixel et à l'échange parasite entre pixels (diaphotie). C'est dans ce contexte qu'a été développé le Pixel à Tranchées Profondes Capacitives et Grille de Transfert verticale (pixel CDTI+VTG). Basé sur la structure d'un pixel « 4T », il intègre une isolation électrique par tranchées, une photodiode profonde plus volumineuse et une grille verticale permettant le stockage profond et le transfert des électrons. Des procédés de fabrication permettant cette intégration spécifique ont tout d'abord été développés. Parallèlement, une étude détaillée des transistors du pixel, également isolés par CDTI a été menée. Ces tranchées capacitives d'isolation actionnées en tant que grilles supplémentaires ouvrent de nombreuses applications pour un transistor multi-grille compatible avec un substrat massif. Un démonstrateur de 3MPixels intégrant des pixels d'une taille de 1.75*1.75 μm² a été réalisé dans une technologie CMOS 120 nm. Les performances de ce capteur ont pu être déterminées, en particulier en fonction de la tension appliquée aux CDTI. Un bas niveau de courant d'obscurité a tout particulièrement été obtenu grâce à la polarisation électrostatique des tranchées d'isolation / CMOS image sensors showed in the last few years a dramatic reduction of pixel pitch. However pitch shrinking is increasingly facing crosstalk and reduction of pixel signal, and new architectures are now needed to overcome those limitations. Our pixel with Capacitive Deep Trench Isolation and Vertical Transfer Gate (CDTI+VTG) has been developed in this context. Innovative integration of polysilicon-filled deep trenches allows high-quality pixel isolation, vertically extended photodiode and deep vertical transfer ability. First, specific process steps have been developed. In parallel, a thorough study of pixel MOS transistors has been carried out. We showed that capacitive trenches can be also operated as extra lateral gates, which opens promising applications for a multi-gate transistor compatible with CMOS-bulk technology. Finally, a 3MPixel demonstrator integrating 1.75*1.75 μm² pixels has been realized in a CMOS 120 nm technology. Pixel performances could be measured and exploited. In particular, a low dark current level could be obtained thanks to electrostatic effect of capacitive isolation trenches

Grâce à l'explosion du marché grand public des smartphones et tablettes, les capteurs d'image CMOS ont bénéficiés de développements technologiques majeurs leur permettant de rivaliser voir même de devancer les performances des capteurs CCD. En parallèle, dans les domaines de l'aérospatial ou de l'imagerie médicale, des capteurs CMOS ont également été développés pour des applications à fortes valeurs ajoutées avec des technologies reconnues pour leur robustesse en environnement ionisant. Le travail de cette thèse a pour but de réunir dans une même architecture de pixel les dernières avancées technologiques développées pour les capteurs grands publics avec une solution novatrice de durcissement aux rayonnements ionisants récemment développée chez STMicroelectronics. Pour la première fois, cette nouvelle architecture de pixel de 1,4µm de côté et éclairée par la face arrière intègre une photodiode pincée verticale à collection de trous, une chaine de lecture composée de transistors PMOS et des tranchées d'isolation profondes à passivation passive ou active. Ce type de pixel a été conçu à l'aide de simulations TCAD en trois dimensions qui ont permis d'optimiser l'intégration de procédés pour sa fabrication. Il a été caractérisé et comparé à un pixel équivalent de type N avant et après irradiation par rayonnement gamma. Le pixel développé au cours de cette thèse présente intrinsèquement un plus faible courant d'obscurité que son homologue de type N et une meilleure résistance aux radiations. La passivation active des tranchées d'isolation profondes permet d'atténuer fortement l'impact des dégradations habituellement observées au niveau des interfaces Si/SiO2 et s'avère donc prometteuse en environnement ionisant. Des mécanismes intrinsèquement différents de formation de pixels blancs sous irradiation ont été mis en évidence pour les pixels de type P et de type N. Enfin, les technologies de l'éclairement par la face arrière et de la photodiode verticale contribuent chacune à la bonne efficacité quantique du pixel ainsi qu'à sa capacité de stockage importante / Thanks to the growing smartphones and tablets consumer markets, CMOS image sensors have benefited from major technology developments and are able to rival with and even outperform CCD sensors. In parallel, for spatial and medical imaging applications, CMOS sensors have been developed using technologies recognized for their robustness in harsh ionizing environment. This Ph.D. thesis work aims at combining in one single pixel architecture the latest technology developments driven by consumer applications with a novel solution for radiation hardening recently developed at STMicroelectronics. For the first time, this innovative back-side illuminated pixel architecture integrates within a 1.4µm pitch a vertical pinned photodiode based on hole-collection, a PMOS readout chain and deep trench isolation with either passive or active interface passivation. This pixel has been developed using 3D-TCAD simulations allowing fast and efficient optimization of its fabrication process. Through a series of electro-optical characterizations, we have compared its performances to its N-type equivalent before and after irradiation with gamma rays. The pixel developed during this thesis exhibits intrinsically lower level of dark current than its N-type counterpart and improved radiation hardness. Active passivation of deep trench isolation greatly decreases the impact of degradations usually observed at Si/SiO2 interfaces and therefore shows very promising results in ionizing environment. Evidence of intrinsically different mechanisms of white pixel formation under irradiation for N-type and P-type pixels have been presented. Finally, back-side illumination technology and the vertical photodiode both contribute to the pixel’s high full well capacity and good quantum efficiency

Dans l'objectif de développer des nouveaux capteurs d'image 3D pour des applications émergeantes, nous avons étudié un pixel de mesure de distance de type « temps de vol ». Nous avons proposé une nouvelle architecture de pixel basée sur la méthode « Continuous-Wave modulation » à trois échantillons par pixel. Cette méthode repose sur la mesure d'un déphasage entre la source lumineuse modulée en amplitude envoyée (source proche infrarouge) et le signal réfléchi par la scène à capturer. Le pixel de dimensions 6,2μm x 6,2μm intègre une photodiode pincée, trois chemins de transfert de charges pour l'échantillonnage successif du signal modulé reçu, et d'un quatrième chemin pour évacuer les charges excédentaires. Les différents chemins de transfert sont constitués d'une grille de transfert de charges de la photodiode vers une mémoire de stockage à canal enterré pour améliorer le rendement et la vitesse de transfert de charges; d'une mémoire à stockage en volume à base de tranchées capacitives profondes afin d'augmenter la dynamique; d'un substrat dont l'épaisseur et le profil de dopage ont été optimisés afin de collecter efficacement les charges photogénérées et ainsi augmenter les performances de démodulation. Un véhicule de test constitué d'une matrice de résolution de 464x197 pixels (QVGA) a été fabriqué, différentes variantes de pixels et différents essais technologiques ont été étudiées et analysées. La fonctionnalité du pixel a été vérifiée pour des fréquences de démodulation de 20MHz à 165MHz, utilisant une source laser de longueur d'onde 850nm ou 950nm. Une première image de profondeur acquise utilisant une matrice de test est une validation du pixel proposé / In order to develop new 3D image sensors for emerging applications, we studied “time of flight” pixel for distance measurement. We have proposed a new pixel architecture based on the "Continuous-Wave Modulation" method with three samples per pixel. This method is based on the measurement of a phase shift between the transmitted amplitude modulated light source (near-infrared source) and the signal reflected by the scene to be captured. The pixel of dimensions 6.2 μm x 6.2 μm integrates a pinned photodiode, three charge transfer paths for successive sampling of the received modulated signal, and a fourth path for anti-blooming purpose. The different paths are controlled by a buried-channel transfer gate for charges transfer from the photodiode to memory in order to improve the efficiency and speed of the charge transfer; A fully depleted memory based on capacitive deep trenches is used to increase the memory storage capacitance; thickness and doping profile of the substrate have been optimized to efficiently collect photogenerated and increase demodulation performance. The designed 464x197-pixel (QVGA) test chip has been fabricated, different pixel variants and different technology trials have been studied and analyzed. Pixel functionality has been verified for demodulation frequencies from 20 to 165MHz, using a laser source of wavelength 850nm or 950nm. A first acquired depth image using the test chip made is a validation of the proposed pixel

Die gemeinsame Integration von Bildsensor und analoger hochparalleler Verarbeitungseinheit stellt eine Möglichkeit zur Realisierung von leistungsfähigen ein-chip Bildaufnahmesystemen dar. Die vorliegende Arbeit liefert Beiträge zum systematischen Entwurf von derartigen Systemen und analysiert bekannte und neuartige Schaltungstechniken bezüglich ihrer Eignung für deren Implementierung. Anhand des vom Autor mitentwickelten CMOS-Bildsensors mit hochparalleler analoger Bildverarbeitungseinheit werden die vorgestellten Methoden und Schaltungstechniken demonstriert. Die Problematik beim Entwurf hochparalleler analoger Systeme besteht in der im Vergleich zu digitalen Systemen geringen Automatisierbarkeit. Es ist kein top-down-Entwurf möglich, da nicht jede beliebige Funktion mit beliebiger Genauigkeit realisierbar ist. Um die jeweilige Genauigkeit der Funktionsblöcke bei der Analyse des hochparallelen Systems berücksichtigen zu können, sind rechenaufwendige Simulationen nötig. Um diesen Rechenaufwand zu senken, wird vorgeschlagen, für die Simulation des Gesamtsystems einen angepaßten Simulator und für die Analyse der schaltungstechnischen Realisierung der Funktionsblöcke konventionelleWerkzeuge für elektrische Netzwerke zu verwenden. Die beiden Simulationsdomänen werden mit Hilfe von numerischen Verhaltensmodellen verbunden. Durch diese Trennung wird die Simulation des Gesamtsystems als Bestandteil des Entwurfsflusses praktikabel. Für die Bewertung, inwieweit die zufälligen Schwankungen der Bauelementeparameter das Verhalten von Baublöcken beeinflussen, wird die Varianzanalyse als Alternative zur konventionellen Monte-Carlo-Analyse vorgeschlagen. Die Varianzanalyse ist wesentlich weniger rechenaufwendig und liefert genaue Resultate für alle Schaltungseigenschaften mit hinreichend glatten Parameterabhängigkeiten, wenn die Bauelementeparameter als normalverteilt und statistisch unabhängig angenommen werden können. Sie hat darüberhinaus den Vorteil, das Schaltungsverständnis für den Entwerfer zu erhöhen, da sofort die Bauelementeparameter mit dem größten Einfluß auf das Schaltungsverhalten identifiziert werden können. Der Vergleich verschiedener Schaltungstechniken hat gezeigt, daß zeitdiskrete wertkontinuierliche Verfahren, bei denen die Information als Strom repräsentiert wird, für die Realisierung von hochparallelen analogen Systemen besonders geeignet sind. Als besonderer Vorteil ist die weitestgehende Unabhängigkeit des Verhaltens derartiger Schaltungen von Bauelementeparametern hervorzuheben.Weitere Schaltungstechniken, deren Verhalten von zufälligen Parameterabweichungen nur wenig beeinflußt werden, sind in einer Taxonomie zusammengefaßt. Es wurde ein CMOS-Bildsensor mit hochparalleler analoger Bildverarbeitungseinheit und digitaler Ausgabe realisiert. Der current-mode-Bildsensor ist separat von der Verarbeitungseinheit angeordnet. Es wurden vier verschiedene Realisierungsmöglichkeiten untersucht und eine konventionelle integrierende voltage-mode Pixelzelle mit nachfolgendem differentiellen Spannungs- Strom-Wandler realisiert. Das Rechenfeld ist für die räumliche Faltung oder lineare Transformation von Bilddaten mit digital bereitzustellenden Koeffizienten ausgelegt. Dessen Operation basiert auf einer bit-weisen analogen Verarbeitung. Der Schaltkreis wurde erfolgreich getestet. Die nachgewiesene Bildqualität deckt sich in guter Näherung mit den bei der Simulation des Gesamtsystems getroffenen Vorhersagen / The joined implementation of an image sensor and a highly parallel analog processing unit is an advantageous approach for realizing efficient single-chip vision systems. This thesis proposes a design flow for the development of such systems. Moreover known and novel circuit techniques are analysed with respect for their suitability for the implementation of highly parallel systems. The presented methodologies and circuit techniques are demonstrated at the example of a CMOS image sensor with an embedded highly parallel analog image processing unit in whose design the author was involved. One of the major problems in designing highly parallel analog circuits is the low automation compared to the design of digital circuits. As not every function can be realized with arbitrary accuracy top-down-design is not feasible. So, when analysing the system behaviour the respective precision of each function block has to be considered. As this is a very demanding task in terms of computing power, it is proposed to use a dedicated tool for the simulation of the system and conventional network analysis tools for the inspection of the circuit realizations. Both simulation domains are combined by means of numerical behavioural models. By using separate tools system-simulations of highly parallel analog systems as a part of the design flow become practicable. Variance analysis basing on parameter sensitivities is proposed as an alternative to the conventional Monte-Carlo-analysis for investigating the influence of random device parameter variations on the system behaviour. Variance analysis requires much less computational effort while providing accurate results for all circuit properties with sufficiently smooth parameter dependencies if the random parameters can be assumed normally distributed and statistically independent. Additionally, variance analysis increases the designer’s knowledge about the circuit, as the device parameters with the highest influence on the circuit performance can immediately be identified. The comparison of various circuit techniques has shown, that sampled-time continuous-valued current-mode principles are the best choice for realizing highly parallel analog systems. A distinctive advantage of such circuits is their almost independence from device parameters. A selection of further circuit techniques with low sensitivity to random device parameter variations are summarized in a taxonomy. A CMOS image sensor with embedded highly parallel analog image processing unit has been implemented. The image sensor provides a current-mode output and is arranged separate from the processing unit. Four different possibilities for realizing an image sensor have been analysed. A conventional integrating voltage-mode pixel cell with a succeeding differential voltage- to-current-converter has been selected. The processing unit is designed for performing spatial convolution and linear transformation with externally provided digital kernels. It operates in bit-wise analog manner. The chip has been tested successfully. The measured image quality in good approximation corresponds with the estimations made with system simulations.

Within the realm of biosensing, DNA analysis has become an indispensable research tool in medicine, enabling the investigation of relationships among genes, proteins, and drugs. Conventional DNA microarray technology uses multiple lasers and complex optics, resulting in expensive and bulky systems which are not suitable for point-of-care medical diagnostics. The immobilization of DNA probes across the microarray substrate also results in substantial spatial variation. To mitigate the above shortcomings, this thesis presents a set of techniques developed for the CMOS image sensor for point-of-care spectrally-multiplexed fluorescent DNA sensing and other fluorescence biosensing applications. First, a CMOS tunable-wavelength multi-color photogate (CPG) sensor is presented. The CPG exploits the absorption property of a polysilicon gate to form an optical filter, thus the sensor does not require an external color filter. A prototype has been fabricated in a standard 0.35μm digital CMOS technology and demonstrates intensity measurements of blue (450nm), green (520nm), and red (620nm) illumination. Second, a wide dynamic range CMOS multi-color image sensor is presented. An analysis is performed for the wide dynamic-range, asynchronous self-reset with residue readout architecture where photon shot noise is taken into consideration. A prototype was fabricated in a standard 0.35μm CMOS process and is validated in color light sensing. The readout circuit achieves a measured dynamic range of 82dB with a peak SNR of 46.2dB. Third, a low-power CMOS image sensor VLSI architecture for use with comparator based ADCs is presented. By eliminating the in-pixel source follower, power consumption is reduced, compared to the conventional active pixel sensor. A 64×64 prototype with a 10μm pixel pitch has been fabricated in a 0.35μm standard CMOS technology and validated experimentally. Fourth, a spectrally-multiplexed fluorescence contact imaging microsystem for DNA analysis is presented. The microsystem has been quantitatively modeled and validated in the detection of marker gene sequences for spinal muscular atropy disease and the E. coli bacteria. Spectral multiplexing enables the two DNA targets to be simultaneously detected with a measured detection limit of 240nM and 210nM of target concentration at a sample volume of 10μL for the green and red transduction channels, respectively.

Within the realm of biosensing, DNA analysis has become an indispensable research tool in medicine, enabling the investigation of relationships among genes, proteins, and drugs. Conventional DNA microarray technology uses multiple lasers and complex optics, resulting in expensive and bulky systems which are not suitable for point-of-care medical diagnostics. The immobilization of DNA probes across the microarray substrate also results in substantial spatial variation. To mitigate the above shortcomings, this thesis presents a set of techniques developed for the CMOS image sensor for point-of-care spectrally-multiplexed fluorescent DNA sensing and other fluorescence biosensing applications. First, a CMOS tunable-wavelength multi-color photogate (CPG) sensor is presented. The CPG exploits the absorption property of a polysilicon gate to form an optical filter, thus the sensor does not require an external color filter. A prototype has been fabricated in a standard 0.35μm digital CMOS technology and demonstrates intensity measurements of blue (450nm), green (520nm), and red (620nm) illumination. Second, a wide dynamic range CMOS multi-color image sensor is presented. An analysis is performed for the wide dynamic-range, asynchronous self-reset with residue readout architecture where photon shot noise is taken into consideration. A prototype was fabricated in a standard 0.35μm CMOS process and is validated in color light sensing. The readout circuit achieves a measured dynamic range of 82dB with a peak SNR of 46.2dB. Third, a low-power CMOS image sensor VLSI architecture for use with comparator based ADCs is presented. By eliminating the in-pixel source follower, power consumption is reduced, compared to the conventional active pixel sensor. A 64×64 prototype with a 10μm pixel pitch has been fabricated in a 0.35μm standard CMOS technology and validated experimentally. Fourth, a spectrally-multiplexed fluorescence contact imaging microsystem for DNA analysis is presented. The microsystem has been quantitatively modeled and validated in the detection of marker gene sequences for spinal muscular atropy disease and the E. coli bacteria. Spectral multiplexing enables the two DNA targets to be simultaneously detected with a measured detection limit of 240nM and 210nM of target concentration at a sample volume of 10μL for the green and red transduction channels, respectively.