This thesis deals with the development of high speed InPmesa HBT’s with power gain cut—off frequencies up toand above 300 GHz, with high current density and low collectordischarging times. Key developments are Pd—based base ohmics yielding basecontact resistances as low as 10 Ωµm2, base—collector grades to enable to use ofInP in the collector, and an increase in the maximum currentdensity through collector design and thermal optimization.HBT’s with a linear doping gradient in the base are forthe first time reported and compared to HBT’s with abandgap graded base. The effect of degenerate base doping issimulated, as well as the base transit time. Key results include a DHBT with a 215 nm thick collector andan fτ= 280GHz, and fmax=400 GHz. This represents the highest fmaxreported for a mesa HBT. Results also include aDHBT with a 150 nm thick collector and an fτ= 300 GHz, and fmax=280 GHz. The maximum operating current densityhas been increased to above 10 mAµm while maintaining fτand fmax≥ 200 GHz. A mesa DHBT process with and as much yield and simplicity aspossible has been developed, while maintaining or pushingworld—class performance.

<p>This thesis deals with the development of high speed InPmesa HBT’s with power gain cut—off frequencies up toand above 300 GHz, with high current density and low collectordischarging times.</p><p>Key developments are Pd—based base ohmics yielding basecontact resistances as low as 10 Ωµm², base—collector grades to enable to use ofInP in the collector, and an increase in the maximum currentdensity through collector design and thermal optimization.HBT’s with a linear doping gradient in the base are forthe first time reported and compared to HBT’s with abandgap graded base. The effect of degenerate base doping issimulated, as well as the base transit time.</p><p>Key results include a DHBT with a 215 nm thick collector andan f_τ= 280GHz, and f_max=400 GHz. This represents the highest f_maxreported for a mesa HBT. Results also include aDHBT with a 150 nm thick collector and an f_τ= 300 GHz, and f_max=280 GHz. The maximum operating current densityhas been increased to above 10 mAµm while maintaining f_τand f_max≥ 200 GHz.</p><p>A mesa DHBT process with and as much yield and simplicity aspossible has been developed, while maintaining or pushingworld—class performance.</p>

Les technologies de transistors bipolaires à hétérojonctions (HBT) ont montré leur efficacité pour permettre aux circuits de traiter les grands signaux au delà de 100Gbit/s pour les réseaux optiques Ethernet. Pour assurer ce résultat, une bonne fiabilité doit être garantie. Des tests de vieillissements accélérés sous contraintes thermiques et électrothermiques sont réalisés et analysés avec les outils de simulation physique Sentaurus TCAD afin d’obtenir les lois de vieillissement physiques. Le modèle compact HICUM niveau 2, basé sur la physique, est utilisé pour modéliser précisément le composant avant vieillissement, puis pour ajuster les caractéristiques intermédiaires pendant le vieillissement. L’évolution des paramètres du modèle est décrit avec des équations appropriées pour obtenir un modèle électrique compact du vieillissement basé sur la physique. Les lois de vieillissement et les équations d’évolutions des paramètres avec le temps de contrainte sont implantées dans le modèle électrique de vieillissement en langage Verilog-A, ce qui permet de simuler l’impact des mécanismes de défaillances sur le circuit en conditions opérationnelles. / Modern InP Heterojunction Bipolar Transistors (HBT) technology has shown its efficiency for making large signal ICs working above 100 Gbits/s for Ethernet optical transport network. To full-fill this expectation, a good reliability has to be assured. Accelerated aging tests under thermal and electro-thermal stress conditions are performed and analyzed with Sentaurus TCAD device simulation tools to achieve the physical aging laws. The physics based advanced bipolar compact model HICUM Level 2 is used for precise modeling of the devices before aging. The HICUM parameters are extracted to fit the intermediate characterizations during aging. The evolution of the model parameters is described with suitable equations to achieve a physics based compact electrical aging model. The aging laws and the parameter evolution equations with stress time are implemented in compact electrical aging model in Verilog-A languages which allows us to simulate the impact of device failure mechanisms on the circuit in operating conditions.