In today's fast-paced, instant-gratification-oriented society, everyone is looking for quick fixes. We want it all and we want it now! This mindset is in conflict with the overall process of education and learning which requires time, reflection, and practice. More and more students are entering colleges and universities with weak academic preparation and deficient life skills. This often leads them to engage in unethical practices in order to compete, get ahead and survive academically. Declining academic integrity is a significant issue on almost all college campuses. The purpose of this study was to gain deeper insight into student nurses' perceptions of the concept of instant gratification in general and in nursing education in particular. The implications of the Trinity Paradigm of Intelligence in developing a culture of integrity were also explored. The emerged data supports the notion of "academic disintegrity" as a social problem with a long history of development.

This dissertation proposes an alternative FPGA design compilation flow to reduce the back-end time required to implement an FPGA design to below the level at which the user's attention is lost. To do so, this flow focuses on enforcing modular design for both productivity and code reuse, while minimizing reliance on standard tools. This can be achieved by using a library of precompiled modules and associated meta-data to enable bitstream-level assembly of desired designs. In so doing, assembly would occur in a fraction of the time of traditional back-end tools. Modules could be bound, placed, and routed using custom bitstream assembly with the primary objective of rapid compilation while preserving performance. This turbo flow (TFlow) aims to enable software-like turn-around time for faster prototyping by leveraging precompiled components. As a result, large device compilations would be assembled in seconds, within the deadline imposed by the human attention span. / Ph. D.