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Thesis (Ph.D.)--University of Delaware, 2007. / Principal faculty advisor: Fouad Kiamilev, Dept. of Electrical and Computer Engineering. Includes bibliographical references.

The electrical behavior of on-chip interconnects has become a dominant factor in silicon-based high speed, RF, and mixed-signal integrated circuits. In particular, the frequency-dependent loss mechanisms in heavily-doped silicon substrates can have a large influence on the transmission characteristics of on-chip interconnects. To optimize the performance of the integrated circuit, efficient interconnect models should be available in the design environment. Interconnect models in the form of closed-form expressions or ideal element equivalent circuits are often desirable for fast simulation and circuit optimization. This thesis work is concentrated on the analysis and the methodology for developing closed-form expressions for the frequency-dependent line parameters R(��), L(��), G(��), and C(��) for coplanar-type on-chip interconnects on silicon substrates. In addition, the closed-form expressions for the frequency-dependent series impedance parameters are extended to general interconnect on-chip structures on multilayer substrates. The complete solutions of the frequency-dependent line parameters are formulated in terms of corresponding static (lossless) configurations for which closed-form solutions are readily available. The closed-form expressions for the frequency-dependent series impedance parameters, R(��) and L(��), are obtained from a generalized complex image approach together with a surface impedance formulation including the effects of the frequency-dependent horizontal currents (eddy currents) in the multilayer lossy silicon substrates. Results for single and coupled microstrips on multilayer silicon substrates are shown over a broadband frequency range of 20 GHz and compared with full-wave electromagnetic solutions. For single and coupled coplanar on-chip interconnects, the results are compared with quasi-analytical solutions and validated with available measurement data. The frequency-dependent shunt admittance parameters, G(��) and C(��), are derived in terms of low- and high-frequency asymptotic solutions of the equivalent circuit model combined with the complex image method. Comparisons and validation with measurements are also presented. / Graduation date: 2004

The electrical performance of on-chip interconnects has become a limiting factor to the performance of modern integrated circuits including RFICs, mixed-signal circuits, as well as high-speed VLSI circuits due to increasing operating frequencies, chip areas, and integration densities. It is advantageous to have fast and accurate closed-form expressions for the characteristics of on-chip interconnects to facilitate fast simulation and computer-aided design (CAD) of integrated circuits. This thesis work is mainly concerned with the analysis and the methodology of developing closed-form expressions for the frequency-dependent line parameters R(��), L(��), G(��), and C(��) for microstrip-type on-chip interconnects on silicon substrate. The complete solutions of the frequency-dependent line parameters are formulated in terms of corresponding lossless/static configurations for both single and coupled microstrip-type on-chip interconnects. The series impedance parameters are developed using a complex image approach, which represents the complicated loss effects in the semiconducting silicon substrate. The shunt admittance parameters are developed using low- and high-frequency asymptotic solutions based on the shunt equivalent circuit models. The closed-form expressions are shown to be in good agreement with full-wave and quasi-static electromagnetic solutions. Based on the proposed closed-form solutions, a new on-chip interconnect extractor tool, CELERITY, is implemented. It is shown that the new tool can significantly reduce the simulation time compared with a quasi-static EM-based tool. The proposed extraction technique should be very useful in the design of silicon-based integrated circuits. / Graduation date: 2002

Thesis (Ph. D.)--School of Electrical and Computer Engineering, Georgia Institute of Technology, 2004. Directed by James D. Meindl. / Vita. Includes bibliographical references (leaves 163-169).

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Thesis (M.S.)--Materials Science and Engineering, Georgia Institute of Technology, 2005. / Suresh, Committee Member ; C.P. Wong, Committee Member ; Rao R. Tummala, Committee Chair. Includes bibliographical references.

Thesis (Ph. D.)--University of Texas at Austin, 2006. / Vita. Includes bibliographical references.