In recent years, the interest for parallel multicell converters has grown, which is partially due to the possibility of coupling the inductors used to connect the different commutation cells together. Coupling the inductors to form an InterCell Transformer (ICT) does not usually modify the output current, but it reduces the current ripple in the windings and the flux swing in some regions of the core. It can be shown that this brings a reduction of copper and core losses in the magnetic component. The reduction of the phase current ripple also reduces the difference between turn on and turn off current in the switches, which brings a reduction of switching losses for devices generating more losses at turn off than at turn on. The design of an ICT is not that different from any other magnetic component but it is very specific and inherent features must be taken into account. Taking full benefit of the potential advantages of ICTs requires the development of special tools and methods which are the focus of the study. We show how to design ICTs considering several topologies and different methods, from the most precise and time-consuming to the less accurate but more quickly calculated. The explanation of the ICT design is divided in four main parts: Copper Losses, Core Losses, Flux Density Saturation and Thermal Aspects. Further attention is given to high frequency copper losses since complex phenomena such as skin and proximity effects highly influence the ICT design. Based on Finite Element Method simulations, smart practices are suggested to reduce high and low frequency copper losses, not only in ICTs but also in inductors and transformers. Simple tables are developed to help transformer designers to identify the best configuration of conductors inside a given core window, depending on the current waveform and frequency, number of turns and geometrical parameters. Optimization routines to reduce the ICT total mass, volume, losses or cost are developed and multidimensional interpolation of pre-simulated values of AC resistance and leakage inductance is used to speed up the optimization routine. Comparison of ICT designs with regard to core and conductor material, number of cells and switching frequency is performed. Comparison with regular inductors is also made in order to verify the benefits of this kind of magnetic component. Multilevel converter control aspects applied to three- hase systems is also investigated in terms of the ICT flux. Zero sequence signals, specific for a PWM strategy and converter/load topology, are created in order to minimize the flux in ICTs and consequently reduce even further the mass and size of these components. Comparison between several PWM methods are performed and experimentally verified.

Front-end converters with power factor correction (PFC) capability are widely used in distributed power systems (DPSs). Most of the front-end converters are implemented using a two-stage approach, which consists of a PFC stage followed by a DC/DC converter. The purpose of the front-end converter is to regulate the DC output voltage, supply all the load converters connected to the distributed bus, guarantee current sharing, and charge a bank of batteries to provide backup energy when the power grid breaks down. One of the main concerns of the power supply industry is to obtain a front-end converter with a low-cost PFC stage, while still complying with required harmonic standards, especially for high-power three-phase applications. Having this statement in mind, the main objective of this dissertation is to study front-end converters for DPS applications with PFC to meet harmonic standards, while still maintaining low cost and performance indices. To realize the many aforementioned objectives, this dissertation is divided into two main parts: (1) two-stage front-end converters suitable for telecom applications, and (2) single-stage low-cost AC/DC converters suitable for mainframe computers and server applications. The use of discontinuous conduction mode (DCM) boost rectifiers is extensively explored to achieve simplicity, while reducing the cost for DPS applications. Interleaving of DCM boost rectifiers is also explored as an alternative approach to further reduce the system cost by reducing the filtering requirements. All the solutions discussed are implemented for 3kW applications, while 6kW is obtained by interleaving two converters. / Ph. D.

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / This work presents a detailed analysis about the interleaved buck converter applied to electronic ballasts to supply high power HID lamps, assuming the input voltage as a PFC stage output. As the output capacitor has a maximum value to be applied in parallel with the lamp, parallel operated converters are a suitable choice because the output current ripple cancellation characteristic. Besides, the output current ripple cannot be greater than 5% of the nominal current to avoid acoustic resonance phenomena. Also, interleaved converters allow magnetic and semiconductors losses reduction. The applied topology was the interleaved buck converter, because its inherent characteritstic of the output as a current source. A generalized model for the IBC operating in CCM was obtained, including inductors and semiconductors losses, besides an analysis to achieve the optimum point of design in terms of efficiency, size and complexity of implementation. To apply the IBC in CCM supplying HID lamps, it is necessary inductors current control, which means to guarantee a current source behavior of the converter. For that, two current control loop were designed, one for each inductor being measured via a shunt resistor located at the circuit input. Also, stability was analyzed based on impedance criterion. Finally, complete electronic ballast was presented, gathering a two-cell IBC, full-bridge inverter, measuring circuits for current and voltage and an external circuit for the correct delay of the IBC MOSFETs gate signals. Obtained experimental results were satisfatory, showing equal current sharing, once warm-up stage and closed-loop implementation were via an 8-bits microcontroller. / Este trabalho apresenta uma análise detalhada do conversor buck intercalado como reator eletrônico aplicado à alimentação de lâmpadas de descarga em alta pressão (HID) de alta potência, assumindo a entrada como a saída de uma etapa de correção de fator de potência (PFC). A característica de diminuição da ondulação da corrente de saída de conversores operando em paralelo é uma grande vantagem, pois o capacitor em paralelo com a lâmpada tem um valor limite a fim de garantir a estabilidade do sistema. Aliada a essa condição, a ondulação de corrente na lâmpada não pode ultrapassar 5% da corrente nominal para garantir que não ocorra o fenômeno da ressonância acústica de forma destrutiva. Além disso, permitem redução de perdas magnéticas e nos semicondutores, além de apresentar diminuição na ondulação da corrente de saída através da defasagem dos sinais de comando dos interruptores, diminuindo o capacitor de saída a ser empregado. Em termos de análise do conversor buck intercalado (IBC), foi obtida uma modelagem generalizada para o conversor operando em modo de condução contínua (CCM) incluindo as perdas nos interruptores, indutores e diodo. Também foi realizada uma análise de ponto ótimo de projeto contemplando tamanho, eficiência e complexidade de implementação. Para a utilização do IBC em CCM na alimentação de lâmpadas HID é necessário o controle de corrente dos indutores, ou seja, garantir que o conversor tenha o comportamento semelhante à uma fonte de corrente. Para tal, foram utilizadas duas malhas de controle de corrente, uma para cada indutor, sendo o sinal de controle medido através de um resistor shunt localizado na entrada do conversor. Ainda, foi apresentada uma análise de estabilidade baseada na relação entre as impedâncias da lâmpada e do conversor, com realimentação em modo corrente. Finalmente, o reator completo foi apresentado, constituído do IBC com duas células, inversor full-bridge, circuito inibidor para defasagem dos sinais de comando do IBC e o circuito de medição das correntes e tensão. Os resultados experimentais obtidos foram satisfatórios, com correntes equilibradas, uma vez que o IBC com malha fechada em ambos os indutores foi implementado com um microcontrolador de 8-bits, com frequência de barramento de 16 MHz.

Les travaux présentés dans cette thèse s’inscrivent dans le cadre de l’électrification des sous-systèmes embarqués notamment pour des véhicules électriques/hybrides. Dans ce domaine, un des objectifs permanents est la réduction des coûts et des délais lors de la conception de chaînes d’actionnement mécatroniques. Pour y parvenir, il est nécessaire de doter le concepteur de méthodologies et d’outils adaptés lui permettant de fiabiliser sa démarche de conception et de lever le maximum de risques avant de réaliser les premiers prototypes. Ces systèmes mécatroniques embarqués mobilisent des briques technologiques essentielles dont fait partie le convertisseur d’électronique de puissance. Les performances de ce système reposent sur la capacité des méthodologies de conception à considérer les contraintes pluridisciplinaires liées à son environnement, l’adéquation des technologies, des topologies et des lois de commandes. Ces travaux de thèse montrent comment nous pouvons répondre à ces exigences et besoins à travers le développement d’une méthodologie de conception multi-physique et multi-niveau de convertisseurs multicellulaires (entrelacés) prédisposés par essence à une reconfiguration aisée. Cette méthodologie, basée sur une optimisation sous contraintes multi-physiques, permet des choix systématiques d’architecture optimale et des technologies de composants à partir d’une base de données constructeurs. Elle intègre l’aspect fiabilité dans la conception dès la phase de pré-dimensionnement au même niveau que les autres contraintes (électriques, rendement, thermiques, encombrement, compatibilité électromagnétique). Afin de bien profiter des avantages de ce type de convertisseurs entrelacés, cette intégration de la fiabilité dans la conception «fiabilisation par conception» est parachevée par l’élaboration d’une architecture de commande tolérante aux défauts «fiabilisation par la commande» permettant, une fois le convertisseur conçu, d’augmenter sa disponibilité par reconfiguration matérielle ou logicielle (loi de commande). / This PhD thesis work is in the context of electric/hybrid vehicle embedded subsystems electrification. In mechatronic design field, the permanent objectives are costs and delays reducing. To achieve this, there is need of design methodologies and appropriate tools to perform a reliable design approach and leave maximum of risks before making the first prototypes. Embedded mechatronic systems mobilize technological brick keys which include the power electronic converter. Their performances are based on the capacity of the design methodologies to consider the environment multi-disciplinary constraints, the adequacy of the technologies, topologies and control laws. This thesis work shows how we can meet these requirements and needs through the development of multi-physics and multi-level design methodology for multi-level converters (interleaved) predisposed to an easy reconfiguration. This methodology, based on optimization under multi-physics constraints allows systematic choice of optimal architecture and component technologies from manufacturer database. It integrates the reliability aspect in the design since the pre-sizing process in the same level as the other constraints (electric, efficiency, thermal, volume, electromagnetic compatibility). In order take advantages of such interleaved converters, the integration of reliability in the design "reliability by design" is completed by the development of fault tolerant control architecture "reliability by control" which increase the availability by reconfiguring hardware or software (control law) of the designed converter.

L'apparition de convertisseurs multicellulaires parallèles entrelacés et magnétiquement couplés a conduit ces dernières années à améliorer les performances des convertisseurs (en termes de densité de puissance, d'efficacité, de dynamique,...). Le pendant de ces améliorations successives résulte en une nécessité d'équilibrage précis des courants de phase, ce qui entraîne une complexification de la commande des ces convertisseurs. Une première étape de détermination de la fonction de transfert d'une boucle d'équilibrage des courants nous permet de déterminer la nature des correcteurs d'équilibrage de ces courants. Cette étude nous permet d'appréhender des systèmes plus complexes avec différentes topologies de couplage magnétique entre les bras du convertisseur parallèle. Suite à une étude bibliographique mettant en avant le manque de précision des techniques actuelles de mesure des courants de bras, nous proposons une technique d'émulation analogique précise de ces courants ne nécessitant qu'un seul capteur. Deux prototypes ont été réalisés et permettent de valider cette technique. Enfin, face à l'intérêt grandissant que portent les industriels pour des architectures modulaires, deux innovations permettant de s'affranchir d'un circuit spécifique de supervision sont proposées. Dans un premier temps, une technique modulaire d'équilibrage des courants est proposée et validée expérimentalement : elle permet, entre autres, une mesure différentielle précise des courants de bras. Ensuite, une méthode de génération modulaire de porteuses triangulaires auto-alignées est proposée et validée grâce à la réalisation d'une maquette de test. L'association de ces deux techniques nous permet de proposer une architecture entièrement modulaire ne nécessitant plus de circuit de commande superviseur. / Development of interleaved power converters with coupled inductors has enhanced converters performances (better power density, eciency, transient response. . .). Such improvements lead to the necessity of a precise current-sharing in the converter legs, and consequently to much more complex control strategy for those converters. First step is to determine current sharing loop transfer function in order to choose the kind of sharing corrector and calculate its parameters. State-space representation is used to consider any coupling topology. Because ux induced in coupled inductors must be controlled with accuracy, a bibliography study emphasizes the lack of precision in present current-sensing techniques. Then, a precise analogical emulation of currents in every leg, based on only one current sensor, is proposed. Two prototypes have been developed and validate this approach. Finally, because of growing interest of industrial in modular architectures, two innovations which avoid the use of central specic circuit are presented. First, a masterless and modular current sharing technique is proposed and tested : it allows a very precise dierential current measurement and regulation. Then a modular generation of self-aligned triangular carrier for interleaved converters is proposed and conrmed by test. The association of both techniques leads to a full masterless and modular approach for the control circuit of parallel converter with coupled inductors.

L'objectif de cette thèse est l'étude et la réalisation d'une nouvelle application des convertisseurs multicellulaires parallèles. Le but est de concevoir un système pouvant injecter des forts courants transitoires (milliers d'Ampères) dans l'âme conductrice de câbles haute tension à courant continu afin de mesurer la répartition des charges électriques dans l'isolant par la méthode de l'onde thermique. La structure proposée est basée sur la mise en parallèle de modules de convertisseurs DC/DC à phases couplées utilisant des transformateurs intercellules (ICT). La solution proposée permet de concevoir un dispositif à faible encombrement (portabilité). Une approche de dimensionnement des ICT cycliques basée sur la détermination d'un modèle analytique généralisé permettant de quantifier le flux et la densité de flux à travers le circuit magnétique, est présentée. Une méthode d'optimisation consistant en une permutation des ordres de commande des phases est utilisée pour réduire l'encombrement du coupleur magnétique. Un prototype de convertisseur multicellulaire utilisant un ICT cyclique planar de puissance a été réalisé. Il s'agit d'un module 12 phases, fonctionnant comme une source de courant régulé de 1200 A (grâce à une boucle de régulation de courant), et dont la puissance est de 30 KW. Des résultats expérimentaux validant la possibilité d'utiliser la solution proposée pour la caractérisation diélectrique des câbles haute tension à courant continu sont présentés dans le mémoire. / The purpose of this study is the design of a new application for parallel multi-cell converters. The aim is to setup a portable system that can inject a high current (several Amps current) within 2 s in the conducting core of a HVDC cable, and determinate the distribution of electrical space charge through the insulation using the Thermal Step Method (TSM). The proposed structure will be constituted of paralleled coupled multiphase buck converters using InterCell Transformers (ICT). A dimensioning theoretical approach of planar intercell transformer based on the magnetic core saturation condition is presented. The proposed method is based on calculating a generalized expression on the magnetic flux density matrix for any number of cells. Permutation method is used in order to reduce the magnetic core volume. Its principle is to reduce the flux concentration in the magnetic core by modifying the phase-shift of two successive cells.Finally, the experimental prototype (12-cells 30 kW power converter) using cyclic planar ICT is designed and tested. The converter is used to generate regulated current pulses of 1200 Amps (its operating mode is similar to a current source). Experimental results (thermal step current measurements) are includes in order to confirm the ability of using the proposed solution for power cable dielectric characterization.

Les convertisseurs multicellulaires parallèles permettent de traiter des puissances importantes et de profiter d'une certaine standardisation des équipements. Ces dernières années, ces structures ont connu un regain d'intérêt lié notamment à la possibilité de couplage magnétique des inductances. Ce couplage aboutit à un composant magnétique aux propriétés très différentes appelé Transformateur Inter-Cellules (ICT) ; il ne modifie pas le courant de sortie, par contre il réduit l'ondulation de courant dans les bobines et l'ondulation de flux dans certaines parties du noyau. On peut montrer que ce couplage entraîne une réduction des pertes Joules dans les conducteurs et des pertes magnétiques dans le noyau. La réduction de l'ondulation de courant diminue également le courant efficace dans les semiconducteurs ce qui réduit les pertes par conduction, et la différence entre le courant à l'amorçage et au blocage des interrupteurs, ce qui permet la diminution des pertes dans les semiconducteurs lorsque les pertes au blocage sont supérieures aux pertes à l'amorçage. Le dimensionnement d'un ICT n'est pas fondamentalement différent de celui fait pour d'autres composants magnétiques en ce sens qu'il est basé sur le respect de certaines valeurs limites (induction, température) ce qui suppose une évaluation des différentes pertes et l'élaboration d'un modèle thermique. Par contre, la manière d'évaluer ces différentes grandeurs est tout à fait spécifique et n'a que quelques points communs avec les méthodes de calcul des inductances et des transformateurs Dans ce travail de thèse, on montre comment dimensionner ces ICTs en considérant plusieurs topologies et méthodes différentes, correspondant à différents niveaux de sophistication et de complexité. L'explication de ce dimensionnement est divisée en quatre parties : Pertes Cuivre, Pertes Fer, Densité de Flux de Saturation et Aspects Thermiques. L'évaluation des pertes cuivre liées aux composantes alternatives des ICTs constituent un point particulièrement délicat dans la mesure où elles résultent de la combinaison de deux facteurs eux-mêmes difficiles à évaluer ; l'inductance de fuite qui détermine l'amplitude des courants alternatifs mais dépend des flux principalement non canalisés et circulant dans l'air (volume d'étude important, effets 3D…), et la résistance équivalente des bobinages qui en haute fréquence est sujette à des phénomènes complexes comme les effets de peau et de proximité. En se basant sur l'utilisation d'un logiciel simple mais néanmoins robuste et fiable pour calculer précisément les résistances en haute fréquence et les inductances de fuite des ICTs, plusieurs astuces permettant de réduire les pertes cuivre non seulement des ICTs mais aussi des transformateurs et des inductances sont suggérées. Des tableaux simples sont développés pour aider le concepteur de transformateurs à identifier la meilleur configuration de conducteurs dans une fenêtre de bobinage en prenant en compte la forme d'onde du courant, le nombre de tours des enroulements, la fréquence des courants et les paramètres géométriques. Des formules analytiques et des outils de calcul adéquats ont ensuite été utilisés pour développer des routines d'optimisation ayant pour but la réduction de la masse, du volume, des pertes ou du coût des ICTs. Des interpolations multidimensionnelles des valeurs présimulées des résistances et inductances de fuite en haute fréquence sont utilisées afin de réduire le temps d'exécution de la routine d'optimisation. Plusieurs dimensionnements des ICTs ont été comparées vis-à-vis des matériaux du noyau et des conducteurs, du nombre de cellules de commutation et de la fréquence de découpage. Des comparaisons avec des selfs ont également été faites afin de montrer les avantages de ces ICTs. Des aspects de la commande des convertisseurs multi-niveaux triphasés ont également été étudiés vis-à- is du flux circulant dans les ICTs. Des homopolaires, spécifiques pour chaque stratégie MLI et chaque topologie convertisseur/charge, sont créées afin de minimiser le flux dans les ICTs et par conséquent de réduire davantage la masse et la taille de ces composants. Des comparaisons entre différentes méthodes de MLI sont effectuées et vérifiées expérimentalement. / In recent years, the interest for parallel multicell converters has grown, which is partially due to the possibility of coupling the inductors used to connect the different commutation cells together. Coupling the inductors to form an InterCell Transformer (ICT) does not usually modify the output current, but it reduces the current ripple in the windings and the flux swing in some regions of the core. It can be shown that this brings a reduction of copper and core losses in the magnetic component. The reduction of the phase current ripple also reduces the difference between turn on and turn off current in the switches, which brings a reduction of switching losses for devices generating more losses at turn off than at turn on. The design of an ICT is not that different from any other magnetic component but it is very specific and inherent features must be taken into account. Taking full benefit of the potential advantages of ICTs requires the development of special tools and methods which are the focus of the study. We show how to design ICTs considering several topologies and different methods, from the most precise and time-consuming to the less accurate but more quickly calculated. The explanation of the ICT design is divided in four main parts: Copper Losses, Core Losses, Flux Density Saturation and Thermal Aspects. Further attention is given to high frequency copper losses since complex phenomena such as skin and proximity effects highly influence the ICT design. Based on Finite Element Method simulations, smart practices are suggested to reduce high and low frequency copper losses, not only in ICTs but also in inductors and transformers. Simple tables are developed to help transformer designers to identify the best configuration of conductors inside a given core window, depending on the current waveform and frequency, number of turns and geometrical parameters. Optimization routines to reduce the ICT total mass, volume, losses or cost are developed and multidimensional interpolation of pre-simulated values of AC resistance and leakage inductance is used to speed up the optimization routine. Comparison of ICT designs with regard to core and conductor material, number of cells and switching frequency is performed. Comparison with regular inductors is also made in order to verify the benefits of this kind of magnetic component. Multilevel converter control aspects applied to three- hase systems is also investigated in terms of the ICT flux. Zero sequence signals, specific for a PWM strategy and converter/load topology, are created in order to minimize the flux in ICTs and consequently reduce even further the mass and size of these components. Comparison between several PWM methods are performed and experimentally verified.

The Modular Multilevel Converter (MMC) is one of the most commonly used active converters in the high-/medium-voltage sector due to its many advantages such as high scalability, high efficiency, modularity and low harmonic contents. However, in low-voltage and high-current applications, classical MMC designs are not very economical. Recently there has been interest in a new design of modular multilevel converter with interleaved submodules (ISM-MMC) capable of using lower cost, lower current switches. The aim of this study is to compare several different design configurations for a given ISM-MMC topology including classical MMC and to give the best design approach taking into account the efficiency and energy density of the system. The power loss of ISM-MMC influence the final efficiency. The loss studied in this thesis mainly consists of conduction losses and switching losses in the semiconductor devices and inductor losses. An analytical calculation method is summarized and validated by the simulation result. The simulation result is carried out in PLECS model with different system components. Power density is determined by the output power and the converter dimension. The volume of semiconductor devices and passive components determine the general dimension of the converter. This thesis discusses the selection of semiconductor devices, inductor and capacitor in the system, with semiconductor devices constraining interleaved leg current and submodule voltage, inductor constraining output current ripple and capacitor constraining capacitor voltage fluctuation. After the specific components are designed, their dimensions are evaluated, and thus the power density of different configurations can be compared. / Den modulära multinivåomvandlaren (modular multilevel converter, MMC) är en av de mest använda aktiva omvandlarna inom hög-/mellanspänningssektorn på grund av dess många fördelar som hög skalbarhet, hög verkningsgrad, modularitet och lågt övertonsinnehåll. Men i lågspännings- och högströmsapplikationer är konventionella MMC-konstruktioner inte särskilt ekonomiska. Nyligen har det funnits intresse för en ny design av modulär flernivåomvandlare med interfolierade submoduler (ISM-MMC) som kan uppnå lägre kostnad, och använda mindre halvledarelement. Syftet med denna studie är att jämföra flera olika designkonfigurationer för en given ISM-MMC-topologi inklusive konventionell MMC och att ge den bästa designmetoden med hänsyn till systemets verkningsgrad och energitäthet. Effektförlusten för ISM-MMC påverkar den slutliga verkningsgraden. Förluster som studeras i denna avhandling består huvudsakligen av ledningsförluster och kopplingsförluster i halvledarenheterna och induktorförluster. En analytisk beräkningsmetod sammanfattas och valideras av simuleringsresultatet. Simuleringsresultatet utförs men en PLECS-modell med olika systemkomponenter. Effekttätheten bestäms av uteffekten och omvandlardimensionen. Volymen av halvledarenheter och passiva komponenter bestämmer omvandlarens allmänna dimension. Denna avhandling diskuterar valet av halvledarenheter, induktor och kondensator i systemet, med halvledarenheter som begränsar interfolierad benström och submodulspänning, induktor som begränsar utströmsrippel och kondensatorbegränsande kondensatorspänningsfluktuationer. Efter att de specifika komponenterna har valts utvärderas deras storlek, och därmed kan effekttätheten för olika konfigurationer jämföras.

Made available in DSpace on 2014-12-17T14:56:18Z (GMT). No. of bitstreams: 1 AntonioWAS_DISSERT.pdf: 2078440 bytes, checksum: 8f0b0683ae325a95be82dafa64af1734 (MD5) Previous issue date: 2013-12-18 / Coordena??o de Aperfei?oamento de Pessoal de N?vel Superior / The use of Field Programmable Gate Array (FPGA) for development of digital control strategies for power electronics applications has aroused a growing interest of many researchers. This interest is due to the great advantages offered by FPGA, which include: lower design effort, high performance and highly flexible prototyping. This work proposes the development and implementation of an unified one-cycle controller for boost CFP rectifier based on FPGA. This controller can be applied to a total of twelve converters, six inverters and six rectifiers defined by four single phase VSI topologies and three voltage modulation types. The topologies considered in this work are: full-bridge, interleaved full-bridge, half-bridge and interleaved half-bridge. While modulations are classified in bipolar voltage modulation (BVM), unipolar voltage modulation (UVM) and clamped voltage modulation (CVM). The proposed project is developed and prototyped using tools Matlab/Simulink? together with the DSP Builder library provided by Altera?. The proposed controller was validated with simulation and experimental results / A utiliza??o de Field Programmable Gate Array (FPGA) para o desenvolvimento de estrat?gias de controle digital para aplica??es em eletr?nica de pot?ncia tem despertado um crescente interesse entre muitos pesquisadores. Tal interesse se deve as grandes vantagens apresentadas pelo FPGA, que incluem: menor esfor?o de projeto, alto desempenho e grande flexibilidade de prototipagem. Este trabalho prop?e o desenvolvimento e implementa??o de um controlador unificado, mediante o uso de FPGA, utilizando a t?cnica de controle de um ciclo (One-Cycle Control Technique) para corre??o de fator de pot?ncia com retificadores boost. Este controlador pode ser aplicado a um total de doze conversores, sendo seis inversores e seis retificadores, definidos pela topologia e pelo tipo de modula??o de tens?o. As topologias consideradas neste trabalho s?o: ponte completa, ponte completa intercalada, meia ponte e meia ponte intercalada. Enquanto que as modula??es s?o classificadas em modula??o bipolar de tens?o (MBT), modula??o unipolar de tens?o (MUT) e modula??o com grampeamento de tens?o (MGT). O projeto ? desenvolvido e prototipado utilizando as ferramentas Matlab?/Simulink em conjunto com a biblioteca DSP Builder, disponibilizada pela Altera?. O controlador proposto ? com resultados de simula??o e experimentais