The aim of this work is to get familiar with operating system FreeRTOS and its usage in device design. It also explains usage of SW module LwIP (TCP/IP stack) and Free-MODBUS. Consequently is designed example device, simple operational panel. The panel communicates through ethernet interface using Modbus TCP protocol with connected PLCs on separate network. Its meet function of webserver, HID and also source of real time.

This master's thesis is focused on the design of a highspeed aquizition system which is based on FPGA and a highspeed AD converter with modern JESD204B interface. Considering the requirements, such as high samplig rate, the current range of available devices is limited. Therefore the market overview of the modern IC and modules was made. The resulting design is based on available modules, so the rached sampling rate is up to 5 GSa/s with 12bits resolution. Data from measurement are send to PC via Ethernet which uses lwIp stack and TEMAC core on Microblaze proccessor.

Tato práce se zabývá problematikou optických bezkabelových spojů (FSO). V úvodní kapitole jsou diskutovány přednosti, základní principy a dílčí komponenty FSO spojů. Druhá kapitola se zabývá atmosférou z pohledu šířícího se optického svazku, jejím složením, základními veličinami a jevy v ní nastávajícími. V následující kapitole je popsáno několik metod ke zmírnění jevů majících negativní vliv na kvalitu spoje. Druhá část práce se zabývá návrhem podpůrného systému pro FSO, založeném na softcore mikroprocesoru MicroBlaze, návrhem jednoduchého síťového přepínače a síťového rozhraní. Závěr práce pojednává o implementaci webového serveru a tvorbě webové prezentace umožňující vzdálenou správu FSO a jeho komponent.

Στην παρούσα διπλωματική αναπτύσσεται ένα ενσωματωμένο σύστημα αποτελούμενο από υλικό και λογισμικό, για τον χαρακτηρισμό τηλεπικοινωνιακών διατάξεων. Ειδικότερα μελετάται ο έλεγχος εξειδικευμένης ενσωματωμένης τηλεπικοινωνιακής διάταξης, η αυτοματοποίηση της συλλογής δεδομένων ενδιαφέροντος κατά τη λειτουργία της τηλεπικοινωνιακής διάταξης, καθώς και ο τρόπος επικοινωνίας με το χρήστη αναπτυξιακών συστημάτων που βασίζονται σε FPGA και χρησιμοποιούνται για την κατασκευή προτύπων τηλεπικοινωνιακών διατάξεων. Συγκεκριμένα μελετώνται διαφορετικές τεχνικές εισαγωγής και εξαγωγής δεδομένων από τα FPGAs και αποθήκευσής τους σε σύστημα host. O τρόπος εισαγωγής δεδομένων και παραμέτρων στα υπάρχοντα συστήματα παρουσιάζει συγκεκριμένους περιορισμούς. Εδώ μελετάται ο τρόπος που μπορούν τα δεδομένα και παράμετροι να εισάγονται δυναμικά μέσω ενός φιλικού προς τον χρήστη περιβάλλοντος. Επίσης μελετάται ο τρόπος αυτόματης συλλογής όγκου δεδομένων ενδιαφέροντος και εξαγωγής δεδομένων με ασφαλή και αυτοματοποιημένο τρόπο. Για να επιτευχθεί αυτό αναπτύσσεται ένα ενσωματωμένο σύστημα που η διεπαφή χρήστη γίνεται μέσω web server. Η ανάπτυξη περιλαμβάνει τη χρήση ενσωματωμένου επεξεργαστή διαθέσιμου ως IP block σε FPGA, τη δόμηση ενός συστήματος βασισμένου σε κανάλια επικοινωνίας με χρήση εικονικής διευθυνσιοδότησης, καθώς και τον έλεγχο και σύνδεση της μονάδας προτυποποίησης τηλεπικοινωνιακών διατάξεων με το κανάλι επικοινωνίας του επεξεργαστή. Το σύστημα που προκύπτει είναι ένα ενσωματωμένο σύστημα στο οποίο το λειτουργικό σύστημα βασίζεται σε διακοπές ενώ η διεπαφή χρήστη γίνεται με την ανάπτυξη ενσωματωμένου web server. Με αυτόν τον τρόπο παρέχεται ένα διαδραστικό περιβάλλον που είναι ευρέως διαδεδομένο και με το οποίο ο χρήστης μπορεί να έχει άμεση επαφή με το hardware, ενώ ταυτόχρονα αυτοματοποιεί τη διαδικασία εξαγωγής δεδομένων προσφέροντας αξιοπιστία και υψηλές ταχύτητες. / This thesis presents the development of an embedded system composed of both hardware and software components, for the characterization of a telecommunication prototype. Specifically, we study the control of an advanced telecommunication IP, the automation of collecting interesting data during the operation of the telecommunication device, and ways in available for the engineer to interact with FPGA-based system prototypes. Different techniques of importing and exporting data from the FPGA and storing them to a host system are investigated. The way of importing data and parameters in existing systems presents certain restrictions. In this thesis we study techniques of dynamically importing the data and parameters through a user-friendly environment. We automated the process of collecting data of interest and data retrieval in a secure and reliable manner. To achieve this, an embedded system interface is implemented developing an embedded, on-board web server. The development process includes the use of an embedded processor available as IP block on an FPGA, building a system based on bus channels using virtual addressing, and the connection and the control of telecommunication IP blocks through the bus channel to the processor. The developed system is an embedded system utilizes an interrupt-based operating system offering a user interface based a developed embedded web server. This system provides an interactive environment which is widely used, where the developer can directly access the hardware, and at the same time automates data retrieval and offers reliability and high speed.

The aim of master's thesis is implementation of hardware interface database server. Interface will be collecting data at installation place. Interface will be connected to a remote MySQL server using an Ethernet network and saving data received by serial line in a database.

The diploma thesis deals with creating the Ethernet converter protocol UDP of the CAN bus with the used application layer CANopen. The converter is executed by means of the microcontroller ARM Cortex-M3, namely by STM32F107VC by STMicroelectronics. The project is designed for the purpose of serving as the main motor controlling card of the mobile advertising robot FektBot. In the theoretical part you can find a brief analysis of the ARM microcotrollers problematics, particularly the STM32F107VC. Then the thesis introduces the Ethernet technology including the UDP protocol. Finally, the CAN bus and its application layer CANopen is described. The practical part shows first of all the scheme of converter hardware. You can find there the design of printed circuits including all components for proper functioning, i.e. especially the microcontroller STM32F107VC, Ethernet PHY, the CAN bus transceiver and switched stabilized supply. Next chapter describes software creating for the given converter. Firstly there are analyzed possible ways of STM32F107VC programming, and then there is the main conception of resolving the programming part shown. The thesis then deals with the concrete implementation of the UDP Ethernet protocol. For that, the lwIP stack is used, over which the application layer of the FektBot robot works. Then there is analyzed the implementation of the CAN bus and CANopen. At the end of the practical part, the final execution of the converter software and the ways of its testing are described.

The aim of this work is study the standard for wireless sensor networks IEEE 802.15.4a. Design and implementation of a packet analyzer for ultra wideband technology com- pliant with IEEE 802.15.4a standard. Integrate packet analyzer to inspection software Wireshark and implement dissector for view packets. Finally, analyze and evaluate the parameters of the proposed packet analyzer.

In this thesis is proposed implementation of weather station with web server built on hardware platform with microcontroller STM32f417 and ethernet interface.

The diploma thesis is focused on the building embedded demonstration application of the proprietary Low Complexity Ethernet module for industrial usage further called the LEN/LES 2. At the first, main used technologies such as MCU, or the lightweight IP stack is discussed, Consequently, there is detailed view on system hardware architecture proposed by hardware and software requirements. Then though part describes blocks of embedded system are in term of specific parts and hardware requirements to create universal board. Following chapters expresses first startup and known hardware bugs, LWIP implementation and MODBUS system implementation. The core of the system is the new released microcontroller an ADuCM4050 and the Low Complexity Ethernet MAC-PHY prototype block and much more dependent convenient peripherals of the MCU based application.

This thesis deals with an electronic circuit and a PCB of a modular RGB LED display with the Ehernet interface. Firstly, author describes a RGB colour model, features of RGB LED displays, ways of control them. The next chapter contains a short description of the Ethernet interface, UDP and TCP protocols and a lwIP TCP/IP stack. The last theoretical chapter is an introduction to ARM Cortex-M3 and Cortex-M4 based microcontrollers. The next chaper is deals with a hardware design of the modular RGB LED display. The device is designed to be modular. Individual devices can be combosed together and create a larger display. Data from the Ethernet interface will be displayed on the RGB LED matrix, resolution of the matrix is 32 × 32 (1024 diodes). A refresh frequency is 100 Hz, a color depth is High color (16 bits) and a scanning 1/16 (two rows is driven at the same time). The next chapter describes the firmware for the RGB LED display, all its logical parts including a web page. Author also created the PC application, which sends pictures using UDP protocol to individual modules.