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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
11

Softwarově definované sítě / Software defined networks

Flimel, Peter January 2016 (has links)
This diploma work describes the software-defined network focusing on optical networks. Subsequently designed their own software network that is implemented in the environment OMNeT ++. This work deals with SDN (software-defined network), and impact on current communications environment in the world of telecom-munications services.
12

Ultra-dense co-integration of FeFETs and CMOS logic enabling very-fine grained Logic-in-Memory

Breyer, Evelyn T., Mulaosmanovic, Halid, Trommer, Jens, Melde, Thomas, Dünkel, Stefan, Trentzsch, Martin, Beyer, Sven, Mikolajick, Thomas, Slesazeck, Stefan 23 June 2022 (has links)
Ferroelectric field-effect transistors (FeFET) based on hafnium oxide offer great opportunities for Logic-in-Memory applications, due to their natural ability to combine logic (transistor) and memory (ferroelectric material), their low-power operation, and CMOS compatible integration. Besides aggressive scaling, dense integration of FeFETs is necessary to make electronic circuits more area-efficient. This paper investigates the impact of ultra-dense co-integration of a FeFET and an n-type selector FET, sharing the same active area, arranged in a 2TNOR memory array. The examined FeFETs exhibit a very similar switching behavior as FeFETs arranged in a standard AND-type array, indicating that the ultra-dense co-integration does not degrade the FeFET performance, and thus, paves the path to a very fine-grained, ultra-dense Logic-in-Memory implementation. Based on this densely integrated 2TNOR array we propose a very compact design of a 4-to-1 multiplexer with a build-in look-up table, thus directly merging logic and memory.
13

FPGA programming with VHDL : A laboratory for the students in the Switching Theory and Digital Design course

Azimi, Samaneh, Abba Ali, Safia January 2023 (has links)
This thesis aims to create effective and comprehensive learning materials for students enrolled in the Switching Theory and Digital Design course. The lab is designed to enable students to program an FPGA using VHDL in the Quartus programming environment to control traffic intersections with sensors and traffic signals. This laboratory aims to provide students with practical experience in digital engineering design and help them develop the necessary skills to program and implement state machines for regulating traffic environments
14

Model metropolitní optické sítě / Model of the metropolitan optical network

Prudík, Jiří January 2008 (has links)
The purpose of this master’s thesis is foremost to provide a simple guide how to build elements of optical metropolitan area network. The basic model consists to sequence of construction, network topology, passive and active parts. The collection contains examples of alternative technology such as Wireless LAN with different frequency. The optical network construction based on optical cable, fibres, splices, trays, adapters, connectors and active parts for example a lot of media convertor models. After that there are demonstrating type of wavelength division multiplexer used in metropolitan area network – passive planar PCL splitter. One of the passive planar splitter are used to increase optical fibre channel. At the end of the collection a simplified examples of used measurements – optical time domain reflectometry and optical fibre transmission. Contains standard protocols or reflectogram. The conclusion of this thesis summarizes costs of FTTb (Fibre To The Building) model of optical metropolitan area network in Czech republic and future contribution for society.

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