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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
11

Anemone an adaptive network memory engine /

Hines, Michael R. Gopalan, Kartik. January 2005 (has links)
Thesis (M.S.)--Florida State University, 2005. / Advisor: Dr. Kartik Gopalan, Florida State University, College of Arts and Sciences, Dept. of Computer Science. Title and description from dissertation home page (viewed June 8, 2005). Document formatted into pages; contains ix, 41pages. Includes bibliographical references.
12

The fusing mechanism of NiCr resistors in programmable read-only memory devices.

Kenney, George Brian January 1975 (has links)
Thesis. 1975. M.S.--Massachusetts Institute of Technology. Dept. of Materials Science and Engineering. / Includes bibliographical references. / M.S.
13

Investigation of coincident radio-frequency drive for nondestructive readout in thin-film memories.

January 1968 (has links)
Bibliography: p. 76-77. / Title page reads: Final report ESL-FR-361. / NASA Research Grant NSG-496. M.I.T. Project DSR 76152.
14

Materials consideration for nanoionic nonvolatile memory solutions /

Obi, Manasseh Okocha. January 2009 (has links)
Thesis (M.S.)--Boise State University, 2009. / Includes abstract. Includes bibliographical references (leaves 124-131).
15

Materials consideration for nanoionic nonvolatile memory solutions

Obi, Manasseh Okocha. January 2009 (has links)
Thesis (M.S.)--Boise State University, 2009. / Title from t.p. of PDF file (viewed June 1, 2010). Includes abstract. Includes bibliographical references (leaves 124-131).
16

A Distributed Logic Memory with Two-dimensional Access, as Applied to a Highly Parallel Processor

Redwine, William V. 05 1900 (has links)
Although more sophisticated designs of associative memories are not yet economically practical, with the dynamic advances in integrated circuitry currently taking place, the day appears not long off for an economical sophisticated associative memory to become a reality. This describes a general outline of a sophisticated DLM, but it also describes the actual logic involved in a building a working model. The design process involves formulating a set of commands sufficient to perform the desired algorithms, developing the logic necessary to implement these commands, and finally constructing a working model to test the logic.

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