The research presented covers the theory and design of feedback-driven matching networks for radio frequency power amplifiers. The study examines amplifier classifications, types of tunable components, feedback typologies, and control systems to achieve the desired operation. The work centers on designing and implementing a tunable matching network for an amplifier's input and output. The tunable systems provide the amplifier with a wide range of operational frequencies at reasonable power levels comparable to today's modern communication systems and produce millisecond-based tuning times. Simulated results are verified against a fabricated system prototype and tweaked to provide further insight into the design's operation.

This thesis addresses the potential of implementing watt-level class-AB Power Amplifier (PA) for WLAN in 65 nm CMOS technology, at 2.4 GHz frequency. In total, five PAs have been compared, where the examined parameters were output power (Pout), linearity, power added efficiency (PAE), and area consumption. Four PAs were implemented using conventional cascode topology with different combination of transistors sizes in 65nm CMOS, and one PA using a high-voltage Extended Drain MOS (EDMOS) device, implemented in the same 65 nm CMOS with no process or mask changes. All schematics were created using Cadence Virtuoso CAD tools. The test benches were created using the Agilent's Advance Design System ( ADS) and simulated with the ADS-Cadence dynamic link. The simulation results show that the EDMOS PA (L=350 nm) has the smallest area, but has harder to reach the required Pout. Cascode no. 3 (L= 500,260 nm) has the best Pout (29.1 dBm) and PAE (49.5 %). Cascode no. 2 (L= 500,350 nm) has the best linearity (low EVM). Cascode no. 1 (L=500,500 nm) has low Pout (27.7 dBm). Cascode no.4 (L=500,60 nm) has very bad linearity. The thesis also gives an overview for CMOS technology, discusses the most important aspects in RF PAs design, such as Pout, PAE, gain, and matching networks. Different PA classes are also discussed in this thesis.

Yes / Matching the antenna’s impedance to the RF-front-end of a wireless communications system is challenging as the impedance varies with its surround environment. Autonomously matching the antenna to the RF-front-end is therefore essential to optimize power transfer and thereby maintain the antenna’s radiation efficiency. This paper presents a theoretical technique for automatically tuning an LC impedance matching network that compensates antenna mismatch presented to the RF-front-end. The proposed technique converges to a matching point without the need of complex mathematical modelling of the system comprising of non-linear control elements. Digital circuitry is used to implement the required matching circuit. Reliable convergence is achieved within the tuning range of the LC-network using control-loops that can independently control the LC impedance. An algorithm based on the proposed technique was used to verify its effectiveness with various antenna loads. Mismatch error of the technique is less than 0.2%. The technique enables speedy convergence (< 5 µs) and is highly accurate for autonomous adaptive antenna matching networks. / This work is partially supported by RTI2018-095499-B-C31, Funded by Ministerio de Ciencia, Innovación y Universidades, Gobierno de España (MCIU/AEI/FEDER,UE), and innovation programme under grant agreement H2020-MSCA-ITN-2016 SECRET-722424 and the financial support from the UK Engineering and Physical Sciences Research Council (EPSRC) under grant EP/E022936/1.

In this thesis, novel designs for adaptive power amplifiers, capable of maintaining excellent performance at dissimilar signal parameters, are presented. These designs result in electronically reconfigurable, single-ended and Doherty power amplifiers (DPA) that efficiently sustain functionality at different driving signal levels, highly varying time domain characteristics and wide-spread frequency bands. The foregoing three contexts represent those dictated by the diverse standards of modern communication systems. Firstly, two prototypes for a harmonically-tuned reconfigurable matching network using discrete radio frequency (RF) microelectromechanical systems (MEMS) switches and semiconductor varactors will be introduced. Following that is an explanation of how the varactor-based matching network was used to develop a high performance reconfigurable Class F-1 power amplifier. Afterwards, a systematic design procedure for realizing an electronically reconfigurable DPA capable of operating at arbitrary centre frequencies, average power levels and back-off efficiency enhancement power ranges is presented. Complete sets of closed-form equations are outlined which were used to build tunable matching networks that compensate for the deviation of the Doherty distributed elements under the desired deployment scenarios. Off-the-shelf RF MEMS switches are used to realize the reconfigurability of the adaptive Doherty amplifiers. Finally, based on the derived closed-form equations, a tri-band, monolithically integrated DPA was realized using the Canadian Photonics Fabrication Centre (CPFC??) GaN500 monolithic microwave integrated circuit (MMIC) process. Successful integration of high power, high performance RF MEMS switches within the MMIC process paved the way for the realization of the frequency-agile, integrated version of the adaptive Doherty amplifier.

This letter presents the design and characterization results of a multi-octave power amplifier fabricated in a 0.13μm SiGe-BiCMOS technology. The single stage power amplifier is implemented as the stack of a cascode amplifier combining broadband input matching network with resistive feedback, and a common-base amplifier with base capacitive feedback. Measurement results show that the design delivers a peak saturated output power level of 20.2 dBm, with output 1 dB compression at 19.4 dBm. The measured 3 dB power bandwidth is from 4 GHz to 32 GHz, covering three octaves. The corresponding power fractional bandwidth is 156 %. The measured peak power added efficiency is 20.6 %, and peak small signal gain is 18.6 dB. The fabricated integrated circuit occupies an area of 0.71mm2. To compare state-of-the-art multi-octave power amplifiers, the power amplifier figure of merit defined by the international technology roadmap for semiconductors is modified to include power fractional bandwidth and area. To the knowledge of the authors, the presented design achieves the highest figure of merit among multi-octave power amplifiers in a silicon based integrated circuit technology reported in literature.

Submitted by Diego Rodrigues (diego.rodrigues@icomp.ufam.edu.br) on 2018-12-07T21:38:02Z No. of bitstreams: 2 Diego Rodrigues.pdf: 3673641 bytes, checksum: f1fdd4162dc6acd590136bb6b886704e (MD5) license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) / Approved for entry into archive by Secretaria PPGI (secretariappgi@icomp.ufam.edu.br) on 2018-12-07T22:27:06Z (GMT) No. of bitstreams: 2 Diego Rodrigues.pdf: 3673641 bytes, checksum: f1fdd4162dc6acd590136bb6b886704e (MD5) license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) / Approved for entry into archive by Divisão de Documentação/BC Biblioteca Central (ddbc@ufam.edu.br) on 2018-12-10T19:02:56Z (GMT) No. of bitstreams: 2 Diego Rodrigues.pdf: 3673641 bytes, checksum: f1fdd4162dc6acd590136bb6b886704e (MD5) license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) / Made available in DSpace on 2018-12-10T19:02:56Z (GMT). No. of bitstreams: 2 Diego Rodrigues.pdf: 3673641 bytes, checksum: f1fdd4162dc6acd590136bb6b886704e (MD5) license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) Previous issue date: 2018-10-22 / CAPES - Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / Schema Matching is the problem of finding semantic correspondences between elements from different schemas. This is a challenging problem, since the same concept is often represented by disparate elements in the schemas. The traditional instances of this problem involved a pair of schemas to be matched. However, recently there has been a increasing interest in matching several related schemas at once, a problem known as Schema Matching Networks, where the goal is to identify elements from several schemas that correspond to a single concept. We propose a family of methods for schema matching networks based on machine learning, which proved to be a competitive alternative for the traditional matching problem in several domains. To overcome the issue of requiring a large amount of training data, we also propose a bootstrapping procedure to automatically generate training data. In addition, we leverage constraints that arise in network scenarios to improve the quality of this data. We also propose a strategy for receiving user feedback to assert some of the matchings generated, and, relying on this feedback, improving the quality of the final result. Our experiments show that our methods can outperform baselines reaching F1-score up to 0.83. / Casamento de Esquemas é a tarefa de encontrar correpondências entre elementos de diferentes esquemas de bancos de dados. É um problema desafiador, uma vez que o mesmo conceito geralmente é representado de maneiras distintas nos esquemas.Tradicionalmente, a tarefa envolve um par de esquemas a serem mapeados. Entretanto, houve um crescimento na necessidade de mapear vários esquemas ao mesmo tempo, tarefa conhecida como Casamento de Esquemas em Rede, onde o objetivo é identificar elementos de vários esquemas que correspondem ao mesmo conceito. Este trabalho propõe uma famı́lia de métodos para o problema do casamento de esquemas em rede baseados em aprendizagem de máquina, que provou ser uma alternativa viável para o problema do casamento tradicional em diversos domı́nios. Para superar obstáculo de obter bastantes instâncias de treino, também é proposta uma técnica de bootstrapping para gerar treino automático. Além disso, o trabalho considera restrições de integridade que ajudam a nortear o processo de casamento em rede. Este trabalho também propõe uma estratégia para receber avaliações do usuário, com o propósito de melhorar o resultado final. Experimentos mostram que o método proposto supera outros métodos comparados alcançando valor F1 até 0.83 e sem utilizar muitas avaliações do usuário.