This thesis work contains electrical transport and low frequency (1/f) noise measurements in ultrathin graphene and Molybdenum disulphide (MoS2) field effect transistors (FET). From the measurements, We mainly focus on the origin of disorder in both the materials. To address the orgin of disorder in graphene, we study single and bilayer graphene-FET devices on SiO2 substrate. We observe that both conductivity and mobility are mainly determined by substrate induced long range, short range, and polar phonon scattering. For further confirmation, we fabricate suspended graphene devices which show extremely high mobility. We find that, in contrast to substrate-supported graphene, conductivity and mobility in suspended graphene are governed by the longitudinal acoustic phonon scattering at high temperature and the devices reach a ballistic limit at low temperature. We also conduct low frequency 1/f noise measurements, known to be sensitive to disorder dynamics, to extract more information on the nature of disorder. The measurements are carried out both in substrate-supported and suspended graphene devices. We find that 1/f noise in substarted graphene is mainly determined by the trap charges in the SiO2 substrate. On the other hand, noise behaviour in suspended graphene devices can not be explained with trap charge dominated noise model. More-over, suspended devices exhibit one order of magnitude less noise compared to graphene on SiO2 substrate. We believe noise in suspended graphene devices probably originate from metal-graphene contact regions. In the second part of our work, We present low temperature electrical transport in ultrathin MoS2 fields effect devices, mechanically exfoliated onto Si/SiO2 substrate. Our experiments reveal that the electronic states in MoS2 are localized well up to the room temperature over the experimentally accessible range of gate voltage. This manifests in two dimensional (2D) variable range hopping (VRH) at high temperatures, while below ~ 30 K the conductivity displays oscillatory structures in gate voltage arising from resonant tunneling at the localized sites. From the correlation energy (T0) of VRH and gate voltage dependence of conductivity, we suggest that the charged impurities are the dominant source of disorder in MoS2. To explore the origin of the disorder, we perform temperature dependent I - V measurements at high source-drain bias. These measurements indicate presence of an exponentially distributed trap states in MoS2 which originate from the structural inhomogeneity. For more detailed investigation, we employ 1/f noise which further confirms possible presence of structural disorder in the system. The origin of the localized states is also investigated by spectroscopic studies, which indicate a possible presence of metallic 1T-patches inside semiconducting 2H phase. From all these evidences, we suggest that the disorder is internal, and achieving high mobility in MoS2 FET requires a greater level of crystalline homogeneity.

Recently, high-κ materials have become the focus of research and been extensively utilized as the gate dielectric layer in aggressive scaled complementary metal-oxide-semiconductor (CMOS) technology. Hafnium dioxide (HfO2) is the most promising high-κ material because of its excellent chemical, thermal, mechanical and dielectric properties and also possesses good thermodynamic stability and better band offsets with silicon. Hence, HfO2 has already been used as gate dielectric in modern CMOS devices. For future technologies, it is very difficult to scale the silicon transistor gate length, so it is a necessary requirement of replacing the channel material from silicon to some high mobility material. Two-dimensional layered materials such as graphene and molybdenum disulfide (MoS2) are potential candidates to replace silicon. Due to its planar structure and atomically thin nature, they suit well with the conventional MOSFET technology and are very stable mechanically as well as chemically. HfO2 plays a vital role as a gate dielectric, not only in silicon CMOS technology but also in future nano-electronic devices such as graphene/MoS2 based devices, since high-κ media is expected to screen the charged impurities located in the vicinity of channel material, which results in enhancement of carrier mobility. So, for sustenance and enhancement of new technology, extensive study of the functional materials and its processing is required. In the present work, optimization of HfO2 thin films for gate dielectric applications in Nano-electronic devices using electron beam evaporation is discussed. HfO2 thin films have been optimized in two different thickness regimes, (i) about 35 nm physical thicknesses for back gate oxide graphene/MoS2 transistors and (ii) about 5 nm physical thickness to get Equivalent Oxide Thickness (EOT) less than 1 nm for top gate applications. Optical, chemical, compositional, structural and electrical characterizations of these films have been done using Ellipsometry, X-ray Photoelectron Spectroscopy (XPS), Rutherford Back Scattering (RBS), X-ray Diffraction (XRD), Capacitance-Voltage and Current-Voltage characterization techniques. The amount of O2 flow rate, during evaporation is optimized for 35 nm thick HfO2 films, to achieve the best optical, chemical and electrical properties. It has been observed that with increasing oxygen flow rate, thickness of the films increased and refractive index decreased due to increase in porosity resulting from the scattering of the evaporant. The films deposited at low O2 flow rates (1 and 3 SCCM) show better optical and compositional properties. The effects of post deposition annealing (PDA) and post metallization annealing (PMA) in forming gas ambient (FGA) on the optical and electrical properties of the films have been analyzed. The film deposited at 3 SCCM O2 flow rate shows the best properties as measured on MOS capacitors. A high density film (ρ=8.2 gram/cm3, 85% of bulk density) with high dielectric constant of κ=19 and leakage current density of J=2.0×10-6 A/cm2 at -1 MV/cm has been achieved at optimized deposition conditions. Bilayer graphene on HfO2/Si substrate has been successfully identified and also transistor has been fabricated with HfO2 (35 nm) as a back gate. High transconductance compared to other back gated devices such as SiO2/Si and Al2O3/Si and high mobility have been achieved. The performance of back gated bilayer graphene transistors on HfO2 films deposited at two O2 flow rates of 3 SCCM and 20 SCCM has been evaluated. It is found that the device on the film deposited at 3 SCCM O2 flow rate shows better properties. This suggests that an optimum oxygen pressure is necessary to get good quality films for high performance devices. MoS2 layers on the optimized HfO2/Si substrate have been successfully identified and transistor has been fabricated with HfO2 (32 nm) as a back gate. The device is switching at lower voltages compared to SiO2 back gated devices with high ION/IOFF ratio (>106). The effect of film thickness on optical, structural, compositional and electrical properties for top gate applications has been studied. Also the effect of gate electrode material and its processing on electrical properties of MOS capacitors have been studied. EOT of 1.2 nm with leakage current density of 1×10-4 A/cm2 at -1V has been achieved.