With rapid advances in semiconductor technologies and packaging schemes, wireless products have become more versatile, portable, inexpensive, and user friendly over last few decades. However, the ever-growing demand of consumers to share information efficiently at higher speeds requires higher data rates, increased functionality, lower cost, and more reliability. The 60-GHz-frequency band, with 7 GHz license-free bandwidth addresses, such demands, and promises a low-cost multi-Gbps wireless transmission with a power budget in the order of 100 mW. This dissertation presents the systematic development of key building blocks and integrated 60-GHz-receiver solutions. Two different approaches are investigated and implemented in this dissertation: (1) low-cost SiGe-based direct-conversion low-power receiver front-end utilizing gain-boosting techniques in the front-end low-noise amplifier, and (2) CMOS-based heterodyne receiver front-end suitable for high-performance single-chip 60 GHz transceiver solution. The ASK receiver chip, implemented using 0.18 ?m SiGe, presents a complete antenna-to-baseband multi-gigabit 60 GHz solution with the lowest reported power budget (25 pJ/bit) to date. The subharmonic direct conversion front-end, implemented using 0.18 ?m SiGe, presents excellent conversion properties with a 4 GHz DSB RF bandwidth. On the other hand, the CMOS heterodyne implementation of the 60 GHz front-end receiver, targeted towards a robust, single-chip, high-performance, low-power, and integrated 60 GHz transceiver solution, presents the most wideband receiver front-end reported to date. Finally, different multi-band and tunable millimeter-wave circuits are presented towards the future implementation of cognitive and multi-band millimeter-wave radio.