Spelling suggestions: "subject:"multiprocessors"" "subject:"ultiprocessors""
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Optimal synchronous multiprocessor compiler for fully specified flow graphsGelabert, Pedro R. 12 1900 (has links)
No description available.
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Atlas : a dynamically parallelizing chip-multiprocessor for gigascale integrationCodrescu, Lucian 05 1900 (has links)
No description available.
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Multiprocessor design methodology for real-time DSP systems represented by shift-invariant flow graphsForren, Helmut R. 08 1900 (has links)
No description available.
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Heterogeneity-aware approaches to optimizing performance of computing and communication tasksHuang, Jun. January 2005 (has links) (PDF)
Thesis (Ph.D.)--Auburn University, 2005. / Abstract. Includes bibliographic references (ℓ. 112-116)
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Concurrency in multi-core processor designClancy, Patrick January 1900 (has links)
Thesis (B.A.)--Haverford College, [Dept. of Computer Science, 2007]. / Includes bibliographical references.
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The implementation and evaluation of parallel algorithms on C.mmp /Oleinick, Peter N. January 1978 (has links)
Thesis (Ph. D.)--Carnegie-Mellon University. / "CMU-CS-78-151." "Supported by the Defense Advanced Research Projects Agency (Contract: F44620-73-C-0074, monitored by the Air Force Office of Scientific Research), and in part by the Office of Naval Research (Contract: N00014-77-C-0500." Includes bibliographical references (leaves [96]-97).
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Exploiting deferred destruction : an analysis of read-copy-update techniques in operating system kernels /McKenney, Paul E. January 2004 (has links)
Thesis (Ph. D.)--OGI School of Science & Engineering at OHSU, 2004. / Includes bibliographical references (leaves 351-358).
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Process migration on multiprocessor systems /Shea, Kai-ming. January 1997 (has links)
Thesis (Ph. D.)--University of Hong Kong, 1997. / Includes bibliographical references (leaf 123-125).
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Improving processor efficiency by exploiting common-case behaviors of memory instructionsSubramaniam, Samantika. January 2009 (has links)
Thesis (M. S.)--Computing, Georgia Institute of Technology, 2009. / Committee Chair: Loh, Gabriel H.; Committee Member: Clark, Nathan; Committee Member: Jaleel, Aamer; Committee Member: Kim, Hyesoon; Committee Member: Lee, Hsien-Hsin S.; Committee Member: Prvulovic, Milos.
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Performance evaluation of a heirarchical task queue organization for multiprocessor systems.Cheng, Siu Pang Philip, Carleton University. Dissertation. Computer Science. January 1992 (has links)
Thesis (M.C.S.)--Carleton University, 1992. / Also available in electronic format on the Internet.
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