This research is focused on identifying an appropriate design for a reconfigurable Body Area Network (BAN). In order to investigate the benefits and drawbacks of the proposed design, a BAN system prototype was built. This system consists of two distinct node types: a slave node and a master node. These nodes communicate using ZigBee radio transceivers. The microcontroller-based slave node acquires sensor data and transmits digitized samples to the master node. The master node is FPGA-based and runs uClinux on a soft-core microcontroller. The purpose of the master node is to receive, process and store digitized sensor data. In order to verify the operation of the BAN system prototype and demonstrate reconfigurability, a specific application was required. Pattern recognition in electrocardiogram (ECG) data was the application used in this work and the MIT-BIH Arrhythmia Database was used as the known data source for verification. A custom test platform was designed and built for the purpose of injecting data from the MIT-BIH Arrhythmia Database into the BAN system. The BAN system designed and built in this work demonstrates the ability to record raw ECG data, detect R-peaks, calculate and record R-R intervals, detect premature ventricular and atrial contractions. As this thesis will identify, many aspects of this BAN system were designed to be highly reconfigurable allowing it to be used for a wide range of BAN applications, in addition to pattern recognition of ECG data.

Målet med examensarbetet är att implementera en mjuk CPU i en FPGA-krets som finns tillgänglig på ett ALTERA DE2 Board. Denna mjuka processor integreras i ett projekt skapat i utvecklingsmiljön Quartus II. Den kommunicera med programmerad logik i FPGA:n och den signalbehandlar en audiosignal (stereo), så att ett eko kan genereras och att volym och balans blir justerbar. Detta styrs av ett tangentbord som kopplas till DE2-kortet och de olika förändringarna på utsignalen visas på en LCD. / The ambition with this thesis is to implement a soft CPU i a FPGA-circuit which is available on an ALTERA DE2 Board. This soft processor is integrated in a project designed in the development environment: Quartus II CAD System. It communicates with programmed logic in the FPGA and it alters an audiosignal so that an eco is generated and so that volume and balance can be adjusted. This is controled from a keyboard which is connected to the DE2-card and all the different adjustments of the outsignal are shown on an LCD.

Submitted by Rodrigo Martins Cruz (rodrigo.cruz@ufvjm.edu.br) on 2015-01-05T11:03:10Z No. of bitstreams: 2 bruna_nogueira_herculano.pdf: 745203 bytes, checksum: f53db5ccb9c8f2ef5c4ca15e8191e36a (MD5) license_rdf: 23898 bytes, checksum: e363e809996cf46ada20da1accfcd9c7 (MD5) / Approved for entry into archive by Rodrigo Martins Cruz (rodrigo.cruz@ufvjm.edu.br) on 2015-01-05T11:34:09Z (GMT) No. of bitstreams: 2 bruna_nogueira_herculano.pdf: 745203 bytes, checksum: f53db5ccb9c8f2ef5c4ca15e8191e36a (MD5) license_rdf: 23898 bytes, checksum: e363e809996cf46ada20da1accfcd9c7 (MD5) / Approved for entry into archive by Rodrigo Martins Cruz (rodrigo.cruz@ufvjm.edu.br) on 2015-01-05T11:34:24Z (GMT) No. of bitstreams: 2 bruna_nogueira_herculano.pdf: 745203 bytes, checksum: f53db5ccb9c8f2ef5c4ca15e8191e36a (MD5) license_rdf: 23898 bytes, checksum: e363e809996cf46ada20da1accfcd9c7 (MD5) / Made available in DSpace on 2015-01-05T11:34:24Z (GMT). No. of bitstreams: 2 bruna_nogueira_herculano.pdf: 745203 bytes, checksum: f53db5ccb9c8f2ef5c4ca15e8191e36a (MD5) license_rdf: 23898 bytes, checksum: e363e809996cf46ada20da1accfcd9c7 (MD5) Previous issue date: 2013 / Coordena??o de Aperfei?oamento de Pessoal de N?vel Superior (CAPES) / Foram analisados o consumo, a digestibilidade, os horm?nios tireoidianos e as enzimas hep?ticas, com o objetivo de avaliar os poss?veis efeitos da substitui??o do farelo de soja (FS) pelo farelo de crambe (FC) (Crambe Abyssinica), em dietas para bovinos leiteiros. Foram utilizados quatro bovinos Holand?s x Zebu castrados, com peso m?dio de 664 kg. A dieta foi formulada segundo o NRC (2001), atendendo a rela??o volumoso: concentrado 60:40 na mat?ria seca (MS), tendo a silagem de milho e o feno de tifton com o volumoso em todas as dietas, em propor??es m?dias fixas de 33% e 67% na MS, respectivamente. Os animais receberam quatro dietas contendo 0%, 2,8%, 6,4% e 11,0% de FC na MS da dieta, o qual representava substitui??o do FS em 0%, 33%, 66% e 99% por FC na MS da dieta. N?o foram observados efeitos (p>0,05) dos n?veis de substitui??o para os consumos de mat?ria seca,mat?ria org?nica, fibra em detergente neutro corrigido para cinzas e prote?na, fibra em detergente ?cido, carboidratos n?o fibrosos, prote?na bruta, extrato et?reo e nutrientes digest?veis totais quando expressos em %PV, observando-se m?dias de 2,50%, 2,22%, 1,14%, 0,52%, 0,66%, 0,34%, 0,07% e 1,21%, respectivamente.As digestibilidades aparentes totais da fibra em detergente neutro, fibra em detergente ?cido, carboidratos n?o fibrosos, prote?na bruta e extrato et?reo tamb?m n?o foram influenciadas pelos n?veis crescentes do FC, apresentando valores m?dios de 41,59%, 32,55%, 73,85%, 63,65%, respectivamente. Entretanto, a digestibilidade da mat?ria seca e mat?ria org?nica, reduziram-se, significativamente (p<0,05), com o aumento da inclus?o do FC nas dietas. N?o houve diferen?a (P>0,05) na avalia??o das atividades s?ricas enzim?ticas em nenhum dos tratamentos analisados, sendo os valores m?dios de GGT de 39,03UI/L., AST de 68,34UI/L., e ALT de 24.781UI/L.A inclus?o do FC tamb?m n?o ocasionou diferen?as significativas (P>0,05) para os n?veis de T4 livre 1,27 uUI/mL. Para os teores de TSH, houve maior frequ?ncia de resultados para valores inferiores a 0,008 uUI/mL. O FC n?o afeta o consumo e os par?metros sangu?neos dos bovinos, todavia exerce efeito negativo na digestibilidade da mat?ria seca e da mat?ria org?nica. / The digestibility, the thyroidal hormones and the hepatic enzymes were analyzed with the purpose of measure the possible effects of the substitution of the soy bran for the crambe bran, on the dairy cattle?s diet. It was used four Holstein x Zebu bovines, castrated, with average weight of 664 kg. The diet was formulated according to NRC (2001) serving the relation voluminous: concentrate 60:40 on dry matter (MS), with corn silage and hay as roughage in all diets, with average fixed proportions of 33% and 67% in MS, respectively. The animals received four diets containing 0%, 2.8%, 6.4%and 11.0% of bran in the diet DM crambe, which represented replacement of soybean meal at 0%, 33%, 66% and 99% by bran crambe of the diet DM. No effects were observed (p>0,05) in the levels of by-product for the consumption of dry matter, organic matter, neutral detergent fiber corrected for ash and protein, acid detergent fiber, non-fiber carbohydrates, crude protein, ether extract, total digestible nutrients, when expressed in %PV, observing averages of 2,50%, 2,22%, 1,14%, 0,52%, 0,66%, 0,34%, 0,07% and 1,21%, respectively. The total apparent digestibilities of neutral detergent fiber corrected for ash and protein, acid detergent fiber, non-fiber carbohydrates, crude protein and ether extract, also were not affected by increasing levels of FC presenting medium values of 59,34%, 41,59%, 32,55%, 73,85%, 63,65%, respectively. However, the digestibilities of dry matter and organic matter decreased significantly (p<0,05) with increased inclusion of FC on the diets. There was no difference (p>0,05) in the assessment of seric enzymatic activities in none of the analyzed treatments, with GGT medium values of 39,03UI/L., AST de 68,34UI/L., and ALT de 24.781UI/L. Also levels of by-product did not cause significant differences (p>0,05) in the levels of free T4 1,27 uUI/mL. For the levels of TSH, there was more tendency of resulted a range of results below 0,008 uUI/mL. The FC does not affect the consumption and the blood parameters of the bovines, although it exerts negative effect on the digestibility of dry matter and organic matter. / Disserta??o (Mestrado) ? Programa de P?s-Gradua??o em Zootecnia, Universidade Federal dos Vales do Jequitinhonha e Mucuri, 2013

Technological development has significantly reduced the distance between the performance of systems designed using reconfigurable computing and dedicated hardware. The main sources of performance are the high density level of the FPGAs and the resources? improvement offered by manufacturers, who make more its use more attractive in a variety of applications, emphatically in systems that demand a high degree of flexibility. In this context, the objective of this work consists on the exploration of the resources offered by FPGAs for the development of a multiprocessed platform with the purpose of parallel execution of tasks. In this way, the eCos operating system was modified, with the addition of new characteristics to support of the Symmetric Multiprocessing model, using three soft-Core Altera Nios II processors. On this operating system, all parallelism is directly related to execution of the threads. This platform was analyzed and validated through the execution of parallel algorithms, emphasizing aspects of performance and flexibility compared to other architectures. This work contributes for reaching better results in the execution of tasks in robotics area, which belongs to a domain that demand great competition of tasks, mainly in modules that involve interaction with the external environment / Technological development has significantly reduced the distance between the performance of systems designed using reconfigurable computing and dedicated hardware. The main sources of performance are the high density level of the FPGAs and the resources? improvement offered by manufacturers, who make more its use more attractive in a variety of applications, emphatically in systems that demand a high degree of flexibility. In this context, the objective of this work consists on the exploration of the resources offered by FPGAs for the development of a multiprocessed platform with the purpose of parallel execution of tasks. In this way, the eCos operating system was modified, with the addition of new characteristics to support of the Symmetric Multiprocessing model, using three soft-Core Altera Nios II processors. On this operating system, all parallelism is directly related to execution of the threads. This platform was analyzed and validated through the execution of parallel algorithms, emphasizing aspects of performance and flexibility compared to other architectures. This work contributes for reaching better results in the execution of tasks in robotics area, which belongs to a domain that demand great competition of tasks, mainly in modules that involve interaction with the external environment

O cálculo dos vetores de movimento é utilizado em vários processos na área de visão computacional. Problemas como estabelecer rotas de colisão e movimentação da câmera (egomotion) utilizam os vetores como entrada de algoritmos complexos e que demandam muitos recursos computacionais e consequentemente um consumo maior de energia. O fluxo ótico é uma aproximação do campo gerado pelos vetores de movimento. Porém, para aplicações móveis e de baixo consumo de energia se torna inviável o uso de computadores de uso geral. Um sistema embarcado é definido como um computador desenvolvido com um propósito específico referente à aplicação na qual está inserido. O objetivo principal deste trabalho foi elaborar um módulo em sistema embarcado que realiza o cálculo do fluxo ótico. Foi elaborado um co-projeto de hardware e software dedicado e implementados em FPGAs Cyclone II e Stratix IV para a prototipação do sistema. Desta forma, a implementação de um projeto que auxilia a detecção e medição do movimento é importante não só como aplicação isolada, mas para servir de base no desenvolvimento de outras aplicações como tracking, compressão de vídeos, predição de colisão, etc / The motion vectors calculation is used in many processes in the area of computer vision. Problems such as establishing collision routes and the movement of the camera (egomotion) use this vectors as input for complexes algorithms that require many computational and energy resources. The optical flow is an approximation of the field generated by the motion vectors. However, for mobile, low power consumption applications becomes infeasible to use general-purpose computers. An embedded system is defined as a computer designed with a specific purpose related to the application in which it is inserted. The main objective of this work is to implement a hardware and software co-design to assist the optical flow field calculation using the CycloneII and Stratix IV FPGAs. Sad that, it is easily to see that the implementation of a project to help the detection and measurement of the movement can be the base to the development of others applications like tracking, video compression and collision detection

Το σύστημα που σχεδιάστηκε βασίζεται στον soft-core επεξεργαστή Nios II της ALTERA. Εκτελεί βασικές ρουτίνες επεξεργασίας εικόνας όπως Median Filtering, Negative, Edge Detection, Image Sharpening και ο έλεγχος του επιτυγχάνεται μέσω της οθόνης αφής LTM. Αναλύονται όλες οι βασικές έννοιες, και περιγράφεται τόσο ο επεξεργαστής όσο και οι περιφερειακές μονάδες που χρησιμοποιήθηκαν (LTM, D5M Camera, PIO κτλ.). Το όλο σύστημα υλοποιήθηκε στο DE2-70 Board της ALTERA. / The system that has been developed, is based on the ALTERA‘s soft-core processor Nios II. It implements basic image-processing routines such as Median Filtering, Negative, Edge Detection, Image Sharpening and the control of the system is achieved via the LTM Touch Screen. All fundamental concepts are analyzed, and both the processor and the peripherals used (LTM, D5M Camera, PIO etc) are described in detail. The system was implemented on the ALTERAs DE2-70 Board.

Technological development has significantly reduced the distance between the performance of systems designed using reconfigurable computing and dedicated hardware. The main sources of performance are the high density level of the FPGAs and the resources? improvement offered by manufacturers, who make more its use more attractive in a variety of applications, emphatically in systems that demand a high degree of flexibility. In this context, the objective of this work consists on the exploration of the resources offered by FPGAs for the development of a multiprocessed platform with the purpose of parallel execution of tasks. In this way, the eCos operating system was modified, with the addition of new characteristics to support of the Symmetric Multiprocessing model, using three soft-Core Altera Nios II processors. On this operating system, all parallelism is directly related to execution of the threads. This platform was analyzed and validated through the execution of parallel algorithms, emphasizing aspects of performance and flexibility compared to other architectures. This work contributes for reaching better results in the execution of tasks in robotics area, which belongs to a domain that demand great competition of tasks, mainly in modules that involve interaction with the external environment / Technological development has significantly reduced the distance between the performance of systems designed using reconfigurable computing and dedicated hardware. The main sources of performance are the high density level of the FPGAs and the resources? improvement offered by manufacturers, who make more its use more attractive in a variety of applications, emphatically in systems that demand a high degree of flexibility. In this context, the objective of this work consists on the exploration of the resources offered by FPGAs for the development of a multiprocessed platform with the purpose of parallel execution of tasks. In this way, the eCos operating system was modified, with the addition of new characteristics to support of the Symmetric Multiprocessing model, using three soft-Core Altera Nios II processors. On this operating system, all parallelism is directly related to execution of the threads. This platform was analyzed and validated through the execution of parallel algorithms, emphasizing aspects of performance and flexibility compared to other architectures. This work contributes for reaching better results in the execution of tasks in robotics area, which belongs to a domain that demand great competition of tasks, mainly in modules that involve interaction with the external environment

O cálculo dos vetores de movimento é utilizado em vários processos na área de visão computacional. Problemas como estabelecer rotas de colisão e movimentação da câmera (egomotion) utilizam os vetores como entrada de algoritmos complexos e que demandam muitos recursos computacionais e consequentemente um consumo maior de energia. O fluxo ótico é uma aproximação do campo gerado pelos vetores de movimento. Porém, para aplicações móveis e de baixo consumo de energia se torna inviável o uso de computadores de uso geral. Um sistema embarcado é definido como um computador desenvolvido com um propósito específico referente à aplicação na qual está inserido. O objetivo principal deste trabalho foi elaborar um módulo em sistema embarcado que realiza o cálculo do fluxo ótico. Foi elaborado um co-projeto de hardware e software dedicado e implementados em FPGAs Cyclone II e Stratix IV para a prototipação do sistema. Desta forma, a implementação de um projeto que auxilia a detecção e medição do movimento é importante não só como aplicação isolada, mas para servir de base no desenvolvimento de outras aplicações como tracking, compressão de vídeos, predição de colisão, etc / The motion vectors calculation is used in many processes in the area of computer vision. Problems such as establishing collision routes and the movement of the camera (egomotion) use this vectors as input for complexes algorithms that require many computational and energy resources. The optical flow is an approximation of the field generated by the motion vectors. However, for mobile, low power consumption applications becomes infeasible to use general-purpose computers. An embedded system is defined as a computer designed with a specific purpose related to the application in which it is inserted. The main objective of this work is to implement a hardware and software co-design to assist the optical flow field calculation using the CycloneII and Stratix IV FPGAs. Sad that, it is easily to see that the implementation of a project to help the detection and measurement of the movement can be the base to the development of others applications like tracking, video compression and collision detection

<p>The thesis project consists on developing an interface for a Nios II processor integrated in a board of Altera (UP3- 2C35F672C6 Cyclone II).</p><p>The main goal is show how the Nios II processor can interact with the other components of the board.The Quartus II software has been used to create to vhdl code of the interfaces, compile it and download it into the board. The Nios II IDE tool is used to build the C/C++ files and download them into the processor.</p><p>It has been prepared an application for the audio codec integrated in the board (Wolfson WM8731 24-bit sigma-delta audio CODEC). The line input of the audio codec receives an analog signal from a laptop, this signal is managed by the control interface of the audio codec. The converters ADCs and DACs are stereo 24-bit sigma delta and they are used with oversampling digital interpolation and decimation filters.</p><p>The digital interface of the audio codec sends the digital signal to the Nios II processor and receives the data from the processor. After building the interfaces for the audio codec and the processor, it has been prepared an application in C++ language for the processor that modifies the volume of the signal.</p><p>The signal come back to the audio codec and it is possible to check the results with headphones or speakers at the line output of the audio codec.</p>

The widespread use of navigation devices is increasing rapidly. This all becomes possible mainly due to increased development of hardware, for instance increased computing power (e.g. microcontroller, GPS, Compass) and software. The Handheld Navigation (HNS) is one of the navigation techniques. It is used in different fields. Just like any-other means of navigation, it is used to determine the position and direction of the user accurately and find the shortest track with precision. Global Positioning System (GPS) is a technology that can be used to determine position coordinates, time, speed and course over ground. The electronic compass is a traditional device that is used to determine the current directional angle of the user. The goal of the thesis is to compare the results of directions angle and distance from two designs (direction’s angle and distance are calculated based upon information from GPS receiver and the other direction’s angle and distance are calculated based upon information from GPS receiver and Compass). In the thesis, we have developed dual designs to achieve the goal of the thesis. The first design uses the GPS receiver coordinates to calculate the direction angle and distance, the second design integrates the GPS positioning and the digital compass, to calculate the direction and distance of Handheld Navigation user. Each device communicates with the microcontroller through the interfaces. As there are two designs. Directional results are obtained from each design. Then these results are compared with each other. After comparison, the more accurate result is chosen for the user. A Handheld Navigation PCB board design has been made. In addition SD card and LCD display are used. Both designs have been carried out on Altera Cyclone II FPGAs. The result of the prototyping shows, that the best design for Handheld Navigation System is the design that consists of GPS and Compass because the compass sensing is stable depending on the magnetic north while the previous design depends on calculated direction on movement and then also on the speed of movement. / Handhållna navigationssystem för satellitnavigering, GPS, har blivit allt vanligare. Vid navigation måste man känna till riktningen till målet men också i vilken riktning navigationsutrustningen pekar eftersom detta utgör referens för att beräkna korrigeringar. Om navigationsutrustningen rör sig med en viss hastighet så kan rörelseriktningen beräknas från ett antal på varandra följande positions- koordinater. Denna metod fungerar bra i t.ex. ett fordon som rör sig med en rimlig hastighet. Om systemet skall användas av en person som går så uppstår problem. Personen kan stanna upp och vrida runt i olika riktningar. Då finns då inga bra tidigare koordinater för att beräkna rörelseriktningen dvs. hur navigationssystemet pekar. När personen sedan rör sig i en viss riktning så måste systemet förflyttas en viss sträcka innan riktningen kan beräknas. Längden på den sträcka som krävs påverkas också av noggrannheten hos koordinatbestämningen. GPS- systemet har en icke försumbar osäkerhet på ett antal meter. Om en elektronisk kompass används för att bestämma hur navigationssystemet pekar så försvinner kravet på att systemet måste förflyttas för att kunna bestämma sin riktning. I detta examensarbete har ett GPS baserat navigationssystem utvecklats för att kunna jämföra system baserade på enbart GPS med sådana som har också en elektronisk kompass. Ett utvecklingskort för programmerbar logik har använts som plattform. Kortets FPGA-krets innehåller både processor, Nios-II soft core, och interface mot givare och minnen. Resultaten från testerna visar, inte helt oväntat, att ett system med kompass ger en säkrare navigation och en kortare väg mellan start och mål. Detta gäller främst när det finns hinder i vägen.