The thesis of this dissertation is that, despite widespread belief in the security community, systems are still vulnerable to attacks from malicious peripherals delivered over the PCI Express (PCIe) protocol. Malicious peripherals can be plugged directly into internal PCIe slots, or connected via an external Thunderbolt connection. To prove this thesis, we designed and built a new PCIe attack platform. We discovered that a simple platform was insufficient to carry out complex attacks, so created the first PCIe attack platform that runs a full, conventional OS. To allows us to conduct attacks against higher-level OS functionality built on PCIe, we made the attack platform emulate in detail the behaviour of an Intel 82574L Network Interface Controller (NIC), by using a device model extracted from the QEMU emulator. We discovered a number of vulnerabilities in the PCIe protocol itself, and with the way that the defence mechanisms it provides are used by modern OSs. The principal defence mechanism provided is the Input/Output Memory Management Unit (IOMMU). The remaps the address space used by peripherals in 4KiB chunks, and can prevent access to areas of address space that a peripheral should not be able to access. We found that, contrary to belief in the security community, the IOMMUs in modern systems were not designed to protect against attacks from malicious peripherals, but to allow virtual machines direct access to real hardware. We discovered that use of the IOMMU is patchy even in modern operating systems. Windows effectively does not use the IOMMU at all; macOS opens windows that are shared by all devices; Linux and FreeBSD map windows into host memory separately for each device, but only if poorly documented boot flags are used. These OSs make no effort to ensure that only data that should be visible to the devices is in the mapped windows. We created novel attacks that subverted control flow and read private data against systems running macOS, Linux and FreeBSD with the highest level of relevant protection enabled. These represent the first use of the relevant exploits in each case. In the final part of this thesis, we evaluate the suitability of a number of proposed general purpose and specific mitigations against DMA attacks, and make a number of recommendations about future directions in IOMMU software and hardware.

ITC/USA 2007 Conference Proceedings / The Forty-Third Annual International Telemetering Conference and Technical Exhibition / October 22-25, 2007 / Riviera Hotel & Convention Center, Las Vegas, Nevada / While any vehicle that is typically part of a flight test campaign is heavily instrumented to validate its performance, long term vehicle health monitoring is performed by a significantly reduced number of sensors due to a number of issues including cost, weight and maintainability. The development and deployment of smart sensor buses has reached a time in which they can be integrated into a larger data acquisition system environment. The benefits of these types of buses include a significant reduction in the amount of wiring and overall system complexity by placing the appropriate signal conditioners close to their respective sensors and providing data back over a common bus, that also provides a single power source. The use of a smart-sensor data collection bus, such as IntelliBus™1 or IEEE-1451, along with the continued miniaturization of signal conditioning devices, leads to the interesting possibility of permanently embedding data collection capabilities within a vehicle after the initial flight test effort has completed, providing long-term health-monitoring and diagnostic functionality that is not available today. This paper will discuss the system considerations and the benefits of a smart sensor based system and how pieces can be transitioned from flight qualification to long-term vehicle health monitoring in production vehicles.

Approved for public release; distribution in unlimited. / In spite of the fact that wireless network technology has been available for long period of time, there has been very limited wireless networks deployments around the world before 1997 due to the lack of widely recognized standard for wireless networks. Thanks to the approval of the IEEE 802.11 family of standards in 1997, the world has witnessed tremendous deployment and proliferation of wireless networks in all aspects of life. Although the IEEE 802.11 family of standards has been ratified to design radio transceivers for wireless computer stations capable of interconnecting with other wireless computer stations in close proximity, the technology has been successfully employed to design and implement wireless networks with great number of distant wireless computer stations with reasonable data throughput and flexibility. This thesis explores the wireless network technology and the primary building blocks and components of a wireless network. It also explores the IEEE 802.11 standard and its technical specifications including the Physical layer (PHY), the Media Access Control layer (MAC) and the ongoing task forces. Additionally, the thesis examines the wireless network security including the vulnerabilities, ongoing improvements and recommendations. Next, it investigates the market for available wireless devices compatible with the IEEE 802.11 standard that can be used to build a wireless network with high data throughput and high level of security. Subsequently, the thesis formulates a design plan for civilian wireless network with different scenarios in order to provide a speedy solution to the limited broadband service availability in the Sultanate of Oman. Additionally, the thesis formulates a generic design plan for a military wireless network with different scenarios that can be rapidly deployed in the field of operations. / Computer Engineer, Royal Army of Oman

Network on Chip (NoC) has emerged as a competitive and efficient communication infrastructure for the core based design of System on Chip. Resource (core), router and interface between router and core are the three main parts of a NoC. Each core communicates with the network through the interface, also called Resource Network Interface (RNI). One approach to speed up the design at NoC based systems is to develop standardized RNI. Design of RNI depends to some extent on the type of routing technique used in NoC. Control of route decision base the categorization of source and distributed routing algorithms. In source routing a complete path to the destination is provided in the packet header at the source, whereas in distributed routing, the path is dynamically computed in routers as the packet moves through the network. Buffering, flitization, deflitization and transfer of data from core to router and vice versa, are common responsibilities of RNI in both types of routing. In source routing, RNI has an extra functionality of storing complete paths to all destinations in tables, extracting path to reach a desired destination and adding it in the header flit. In this thesis, we have made an effort towards designing and prototyping a standardized and efficient RNI for both source and distributed routing. VHDL is used as a design language and prototyping of both types RNI has been carried out on Altera DE2 FPGA board. Testing of RNI was conducted by using Nios II soft core. Simulation results show that the best case flit latency, for both types RNI is 4 clock cycles. RNI design is also resource efficient because it consumes only 2% of the available resources on the target platform.

<p>Network on Chip (NoC) has emerged as a competitive and efficient communication infrastructure for the core based design of System on Chip. Resource (core), router and interface between router and core are the three main parts of a NoC. Each core communicates with the network through the interface, also called Resource Network Interface (RNI). One approach to speed up the design at NoC based systems is to develop standardized RNI. Design of RNI depends to some extent on the type of routing technique used in NoC. Control of route decision base the categorization of source and distributed routing algorithms. In source routing a complete path to the destination is provided in the packet header at the source, whereas in distributed routing, the path is dynamically computed in routers as the packet moves through the network. Buffering, flitization, deflitization and transfer of data from core to router and vice versa, are common responsibilities of RNI in both types of routing. In source routing, RNI has an extra functionality of storing complete paths to all destinations in tables, extracting path to reach a desired destination and adding it in the header flit. In this thesis, we have made an effort towards designing and prototyping a standardized and efficient RNI for both source and distributed routing. VHDL is used as a design language and prototyping of both types RNI has been carried out on Altera DE2 FPGA board. Testing of RNI was conducted by using Nios II soft core. Simulation results show that the best case flit latency, for both types RNI is 4 clock cycles. RNI design is also resource efficient because it consumes only 2% of the available resources on the target platform.</p>

Les travaux développés dans cette thèse ont pour cadre général la mise en œuvre d’approches adaptatives permettant de faire évoluer la gestion du réseau en migrant d’une vue "centrée réseau" où l’on se contentait uniquement des paramètres issus du réseau lui-même, vers une vue "centrée utilisateur". Plus particulièrement, ces travaux se sont focalisés sur un des composants principaux de l’ensemble de la chaîne de traitement et de transport, celui de la sélection de la meilleure interface réseau embarquée dans le terminal mobile, l’objectif étant de répondre au mieux aux contraintes imposées par l’environnement. Ces travaux reposent sur une approche décisionnelle dynamique tenant compte de changements dans les paramètres réseaux et des besoins et préférences des utilisateurs au regard des services qui leur sont proposés. En effet, dans l’environnement actuel, se caractérisant par une multiplicité de technologies, d’applications et d’utilisateurs, les terminaux mobiles sont équipés de plusieurs interfaces réseaux. Ces derniers donnent ainsi la possibilité aux utilisateurs de pouvoir basculer dynamiquement d’une interface à une autre dans l’objectif d’assurer une connexion satisfaisant le mieux possible leurs besoins en termes de services en tout lieu, à tout moment et de la meilleure manière possible (ABC, Always Best Connected). Les approches mises en œuvre dans le cadre de la thèse ont permis d’associer simultanément chaque flux d’application à l’interface la plus appropriée de manière à optimiser les performances globales du système. Ainsi, ces travaux ont mené à la proposition d’approches hybrides ayant pour cadre de départ la technique TOPSIS (Technique for Order Preference by Similarity to Ideal Solution) et en y intégrant des modèles issus de la théorie des fonctions de croyance. Pour l’association flux/interface, une proposition basée sur des algorithmes bio-inspirés a été faite dans le cadre de ces travaux. Les résultats obtenus, à la fois par simulation et sur un cas d’usage réel en lien avec le domaine de la santé connectée, ont montré l’efficacité des approches proposées / The work developed in this dissertation has as a general framework the implementation of adaptive user-centric approaches for network interface selection (NIS) and flow/interface association (FIA) in Heterogeneous Wireless Networks (HWNs). The NIS mechanism relies on a dynamic decision approach that considers the change in networks’ parameters and users’ needs and preferences for their current applications. In a heterogeneous environment, the mobile terminals that are equipped with multiple network interfaces provide the possibility for mobile end-users to switch among available network interfaces and select the one that best fulfills their needs anywhere at any time which is known as Always Best Connected (ABC). The approaches proposed in this thesis allowed to associate simultaneously each application flow to its suitable interface in a way that best maximizes the global system performance. This work has led to the proposal of hybrid approaches originating from TOPSIS (Technique for Order Preference by Similarity to Ideal Solution) and integrating models from the belief functions theory for the NIS. Concerning the FIA, a proposal based on bio-inspired algorithms was made as part of this work. Experimental results based on synthetic datasets and an experimental test bed for health monitoring showed the effectiveness of the proposed approaches

Depuis quelques années, les réseaux optiques sur puce (ONoC) sont devenus une solution intéressante pour surpasser les limitations des interconnexions électriques, compte tenu de leurs caractéristiques attractives concernant la consommation d’énergie, le délai de transfert et la bande passante. Cependant, les éléments optiques nécessaires pour définir un tel réseau souffrent d’imperfections qui introduisent des pertes durant les communications. De plus, l'utilisation de la technique de multiplexage en longueurs d'ondes (WDM) permet d'augmenter les performances, mais introduit de nouvelles pertes et de la diaphonie entre les longueurs d'ondes, ce qui a pour effet de réduire le rapport signal sur bruit et donc la qualité de la communication. Les contributions présentées dans ce manuscrit adressent cette problématique d’amélioration de performance des liens optiques dans un ONoC. Pour cela, nous proposons tout d’abord un modèle analytique des pertes et de la diaphonie dans un réseau optique sur puce WDM. Nous proposons ensuite une méthodologie pour améliorer les performances globales du système s'appuyant sur l'utilisation de codes correcteurs d'erreurs. Nous présentons deux types de codes, le premier(Hamming) est d'une complexité d'implémentation faible alors que le second(Reed-Solomon) est plus complexe, mais offre un meilleur taux de correction. Nous avons implémenté des blocs matériels supportant ces corrections d'erreurs avec une technologie 28nm FDSOI. Finalement, nous proposons la définition d'une interface complète entre le domaine électrique et le domaine optique permettant d'allouer les longueurs d'ondes, de coder l'information, de sérialiser le flux de données et de contrôler le driver du laser pour obtenir la modulation à la puissance optique souhaitée. / Electrical Network-on-Chip (ENoC) has long been considered as the de facto technology for interconnects in multiprocessor systems-on-chip (MPSoCs). However, with the increase of the number of cores integrated on a single chip, ENoCs are less and less suitable to adapt the bandwidth and latency requirements of nowadays complex and highly-parallel applications. In recent years, due to power consumption constraint, low latency, and high data bandwidth requirements, optical interconnects became an interesting solution to overcome these limitations. Indeed, Optical Networks on Chip (ONoC) are based on waveguides which drive optical signals  from source to destination with very low latency. Unfortunately, the optical devices used to built  ONoCs suffer from some imperfections which introduce losses during communications. These losses (crosstalk noises and optical losses)  are very important factors which impact the energy efficiency and the performance of the system. Furthermore, Wavelength Division Multiplexing (WDM) technology can help the designer to improve ONoC performance, especially the bandwidth and the latency. However, using the WDM technology leads to introduce new losses and crosstalk noises which negatively impact the Signal to Noise Ratio (SNR) and Bit Error Rate (BER). In detail, this results in higher BER and increases power consumption, which therefore reduces the energy efficiency of the optical interconnects. The contributions presented in this manuscript address these issues. For that, we first model and analyze the optical losses and crosstalk in WDM based ONoC. The model can provide an analytical evaluation of the worst case of loss and crosstalk with different parameters for optical ring network-on-chip. Based on this model, we propose a methodology to improve the performance and then to reduce the power consumption of optical interconnects relying on the use of forward error correction (FEC). We present two case studies of lightweight FEC with low implementation complexity and high error-correction performance under 28nm Fully-Depleted Silicon-On-Insulator (FDSOI) technology. The results demonstrate the advantages of using FEC on the optical interconnect in the context of the CHAMELEON ONoC. Secondly, we propose a complete design of Optical Network Interface (ONI) which is composed of data flow allocation, integrated FECs, data serialization/deserialization, and control of the laser driver. The details of these different elements are presented in this manuscript.  Relying on this network interface, an allocation management to improve energy efficiency can be supported at runtime depending on the application demands. This runtime management of energy vs. performance can be integrated into the ONI manager through configuration manager located in each ONI. Finally, the design of an ONoC configuration sequencer (OCS), located at the center of the optical layer, is presented. By using the ONI manager, the OCS can configure ONoC at runtime according to the application performance and energy requirements.

This graduation thesis is aimed at design and implementation of embedded systems, network communication and support of the network communication for embedded systems. Furthermore it introduces school platform FITkit and offers a conceptional extension of the network interface for this platform based on Ethernet network standard. Based on that conception I'm trying to find and describe suitable solution for FITkit platform which realizes a network interface as a form of extension module capable of development supporting.