Dissertação (mestrado) - Universidade Federal de Santa Catarina, Programa de Pos-Graduação em Ciencia da Computação / Made available in DSpace on 2016-01-08T22:02:05Z (GMT). No. of bitstreams: 1 110472.pdf: 26556501 bytes, checksum: e0866d5565a7b590daddfcb00df4aade (MD5) Previous issue date: 1997 / Nos últimos anos, os requisitos de gerenciamento para redes de computadores tem exigido que plataformas de gerenciamento sejam construídas levando-se em conta os atuais avanços tecnológicos, em função da grande variedade e capacidade dos elementos disponíveis nestes ambientes. Neste trabalho, é proposto um núcleo multithreaded para agentes de uma plataforma de gerenciamento de redes, a qual está sendo implementada seguindo o modelo de gerenciamento OSI/ISO. Conceitos relacionados com gerenciamento OSI/ISO e multithreading, juntamente com a implementação de objetos ativos, serão abordados.

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International Telemetering Conference Proceedings / October 13-16, 1986 / Riviera Hotel, Las Vegas, Nevada / Transaction messages are those which control action at a remote point. They are used in communication networks for such functions as surveillance of alarms, performance monitoring, administration of data bases and tests of leased circuits. Generic interface requirements permit full compatibility of a wide range of telecommunications equipment with common operations systems. The specifications cover all aspects of the interface, from connectors to messages. Existing commercial standards are used where appropriate, including those of the Open System Interconnection (OSI) model. This paper covers the methods used to define the requirements and reports on the status of work in various standards groups.

The McTronX research group of the North–West University has over some years established a knowledge base in active magnetic bearing (AMB) systems. In 2009, an AMB system that met industrial standards in being robust, reliable and economical was developed by the research group. The digital control of the AMB system was implemented with the use of a dedicated single–board computer and communication hardware that interface with the motor drive electronics, power amplifiers and sensor drive units of the AMB system. A Xilinx® field programmable gate array (FPGA), connected to the single–board computer, was used to control the AMB system. The AMB system was designed to be used in a helium blower application and to form a basis for AMB and digital control research. A programmable logic controller (PLC) is connected to the controller to operate the AMB system. To establish communication between the PLC and the FPGA, the Fieldbus standard PROFIBUS DP was chosen as being a robust industrial standard communication protocol. To reduce the cost of the entire system, the need arose to implement the PROFIBUS DP protocol on the current FPGA of the system. This project involves the research, design, implementation, verification and validation of the PROFIBUS DP protocol on a Xilinx® Virtex©–5 FPGA. The PROFIBUS DP standard was researched, analyzed and developed in VHDL for the specific Xilinx® Virtex©–5 FPGA. The implemented protocol is used to establish a standardized PROFIBUS DP network between the PLC and the FPGA controller. Through simulation the basic protocol was tested and later implemented in the real–time environment. Intensive verification and validation was done to ensure that the developed protocol conforms to the robust PROFIBUS DP standard and simultaneously meet the requirements and specifications of the AMB control system. This dissertation documents the entire PROFIBUS implementation process, from standard analysis through to verification and validation of the developed protocol. In conclusion, the developed protocol is compared against a commercial off–the–shelf PROFIBUS PMC module. It was found that the VHDL–based PROFIBUS DP protocol not only competes well with the commercial PROFIBUS device, but also outperforms the device in various aspects. / Thesis (M.Ing. (Computer and Electronical Engineering))--North-West University, Potchefstroom Campus, 2011.

The McTronX research group of the North–West University has over some years established a knowledge base in active magnetic bearing (AMB) systems. In 2009, an AMB system that met industrial standards in being robust, reliable and economical was developed by the research group. The digital control of the AMB system was implemented with the use of a dedicated single–board computer and communication hardware that interface with the motor drive electronics, power amplifiers and sensor drive units of the AMB system. A Xilinx® field programmable gate array (FPGA), connected to the single–board computer, was used to control the AMB system. The AMB system was designed to be used in a helium blower application and to form a basis for AMB and digital control research. A programmable logic controller (PLC) is connected to the controller to operate the AMB system. To establish communication between the PLC and the FPGA, the Fieldbus standard PROFIBUS DP was chosen as being a robust industrial standard communication protocol. To reduce the cost of the entire system, the need arose to implement the PROFIBUS DP protocol on the current FPGA of the system. This project involves the research, design, implementation, verification and validation of the PROFIBUS DP protocol on a Xilinx® Virtex©–5 FPGA. The PROFIBUS DP standard was researched, analyzed and developed in VHDL for the specific Xilinx® Virtex©–5 FPGA. The implemented protocol is used to establish a standardized PROFIBUS DP network between the PLC and the FPGA controller. Through simulation the basic protocol was tested and later implemented in the real–time environment. Intensive verification and validation was done to ensure that the developed protocol conforms to the robust PROFIBUS DP standard and simultaneously meet the requirements and specifications of the AMB control system. This dissertation documents the entire PROFIBUS implementation process, from standard analysis through to verification and validation of the developed protocol. In conclusion, the developed protocol is compared against a commercial off–the–shelf PROFIBUS PMC module. It was found that the VHDL–based PROFIBUS DP protocol not only competes well with the commercial PROFIBUS device, but also outperforms the device in various aspects. / Thesis (M.Ing. (Computer and Electronical Engineering))--North-West University, Potchefstroom Campus, 2011.

Η παρούσα μεταπτυχιακή εργασία καταπιάνεται με την περιοχή των Aσύρματων Δικτύων Αισθητήρων και τα προβλήματα που αυτά αντιμετωπίζουν στην αποδοτική δρομολόγηση της πληροφορίας. Τα ασύρματα δίκτυα αισθητήρων είναι πολύπλοκα συστήματα που αποτελούνται από έναν αριθμό από σχετικά απλές και αυτόνομες συσκευές αίσθησης, οι οποίες αναπτύσσονται σε μια γεωγραφική περιοχή. Η ιδιομορφία των συσκευών αυτών έγκειται στο ότι αντιμετωπίζουν περιορισμούς όσων αφορά τόσο το ενεργειακό τους απόθεμα και συνεπώς την επιχειρησιακή ζωή τους, όσο και στις ικανότητές τους να επεξεργάζονται, αποθηκεύουν και zεκπέμπουν πληροφορία. Η χρησιμότητα των Ασύρματων Δικτύων Αισθητήρων (ΑΔΑ) στηρίζεται στην ικανότητά τους να αναπτύσσονται εύκολα και σχετικά φθηνά, σε μια περιοχή ενδιαφέροντος στην οποία και παρακολουθούν κάποιο συγκεκριμένο φαινόμενο. Επιπλέον φροντίζουν να ενημερώνουν τους σταθμούς βάσης για την κατάσταση και την εξέλιξη του φαινομένου. Στο πλαίσιο αυτό έχουν αναπτυχθεί μια σειρά από αρχιτεκτονικές ασύρματων αισθητήριων κόμβων αλλά και ποικίλα πρωτόκολλα επικοινωνίας αυτών, τα οποία τα δομούν σε δίκτυα. Η συνεισφορά μας έγκειται στην πρόταση τριών νέων πρωτοκόλλων επικοινωνίας για τα ΑΔΑ τα οποία προσπαθούν να εφαρμόσουν την ιδέα της Δικαιοσύνης επιδιώκοντας να βελτιώσουν τόσο την απόδοση των ΑΔΑ όσο και να επιμηκύνουν την επιχειρησιακή τους ζωή. Τα πρωτόκολλα που παρουσιάζουμε άντλησαν την έμπνευσή τους από το πρωτόκολλο PFR (Πρωτόκολλο Πιθανοτικής Προώθησης των Χατζηγιαννάκη, Δημητρίου, Νικολετσέα και Σπυράκη). Όλα τα προτεινόμενα πρωτόκολλα κατηγοριοποιούνται στο επίπεδο Δικτύου του μοντέλου OSI. / This MSc thesis is about Wireless Sensor Networks and focuses on the problems these networks face in order to route information efficiently Wireless Sensor Networks (WSNs) are complex systems which consist of a number of relative simple autonomous sensing devices. These devices are deployed on a geographical area. The particularity of them lies on the fact that they face serious limitations concerning their energy reserves and consequently their operational life as well as regarding their computational, storage and communication capabilities. WSN's usefulness is mainly about its ability of easy and cheap deployment on an area of concern, where it monitors a particular phenomenon. Moreover the WSN's nodes take the initiative to inform certain base stations regarding the status and evolution of this phenomenon. In this context there is a great volume of work in relation to sensor node architectures and communication protocols which turn these numbers of devices to working networks. Our contribution sums up to the proposal of three novel communication protocols for WSNs, which attempt to enforce the idea of Fairness in order to better WSN�s performance and elongate their life. These protocols are highly influenced by PFR protocol introduced by Chatzigiannakis, Demetriou, Nikoletseas and Spirakis. All the proposed protocols belong to the network layer of the OSI standard.

Grace à leur simplicité de routage, la réduction du bruit, de la consommation d'energie, d'espace de routage et d'interférences électromagnétiques en comparaison avec les liaisons parallèles, les Liaisons Série Haut Débit (High-Speed Serial Links) se trouvent aujourd'hui dans la grande majorité des systèmes sur puce (SoC) connectant les différents composants : la puce principale avec ses entrées/sorties, la puce principale avec une autre puce, la communication inter-processeurs etc…Par contre, changer des liaisons parallèles pour utiliser des liaisons séries haut débit présente plusieurs défi : les liaisons série haut débit doivent tourner à des fréquences plus élevées que celle des liaisons parallèles pour atteindre plusieurs Gigabits par seconde (Gbps) pour garder le même débit que celui des liaisons parallèles, tout en répondant à l'augmentation exponentielle de la demande de débit. L'atténuation du signal sur le cuivre augmente avec la fréquence, nécessitant de plus en plus d'égaliseurs et de techniques de filtrage, et donc augmentant la complexité du design et la consommation d'énergie.L'une des façons pour optimiser le design avec des hautes fréquences c'est d'intégrer l'horloge dans la ligne de données, car une ligne d'horloge implique plus de surface de routage et elle pourra bien devenir une source d'interférences électromagnétiques (EMI). Une autre bonne raison pour utiliser une horloge intégrée c'est que la déviation du signal d'horloge par rapport au signal de data (skew en anglais) devient difficile à contrôler sur des fréquences élevées. Des transitions doivent donc être assurées dans les données transmises, pour que le récepteur soit capable de se synchroniser et de récupérer les données correctement. En d'autres termes, le nombre de bits consécutifs, aussi appelé la Run Length (RL) en anglais doit être réduit ou borné à une certaine limite.Un autre défi ou caractéristique à réduire ou borner dans les données à transmettre est la différence entre le nombre de bits à 1 et le nombre de bits à 0 transmis. On l'appelle la disparité RD (de l'anglais Running Disparity). Les grands écarts entre le nombre de bits à 1 et les bits à 0 transférés peuvent provoquer un décalage du signal par rapport à la ligne de base. On appelle ça le Baseline Wander en anglais (BLW). Le BLW pourra augmenter le taux de bits erronés (Bit Error Rate – BER) ou exiger des techniques de filtrage et d'égalisations au récepteur pour être corrigé. Cela va donc augmenter la complexité du design et la consommation d'énergie.Pour assurer une RL et une RD bornées, les données à transmettre sont généralement encodés. A travers le temps, plusieurs méthodes d'encodages ont été présentées et utilisées dans les standards ; certaines présentent de très bonnes caractéristiques mais au cout d'un grand nombre supplémentaire de bits, en anglais appelé Overhead, affectant donc le débit. D'autres encodages ont un overhead moins important mais n'assurent pas les mêmes limites de RL et de RD, et par conséquence ils nécessitent plus de complexité analogique pour corriger les conséquences et donc augmentant ainsi la consommation d'énergie.Dans cette thèse, on propose un nouvel encodage de données qui peut borner la RD et la RL pour les bornes souhaités, et avec un très faible cout sur la bande passante (l'overhead). Ce codage permet de borner la RL et la RD aux mêmes limites que les autres codages et avec un overhead 10 fois moins important.Dans un premier temps on montre comment on peut borner la RL à la valeur souhaitée avec un codage à très faible overhead. Dans un second temps on propose un encodage très faible cout pour borner la RD à la valeur souhaitée aussi. Ensuite on montrera comment on pourra fusionner ces deux encodages en un seul, pour construire un encodage de données programmable et à faible cout de bande passante, limité en disparité et en nombre de bits identiques consécutifs. / Thanks to their routing simplicity, noise, EMI (Electro-Magnetic Interferences), area and power consumption reduction advantages over parallel links, High Speed Serial Links (HSSLs) are found in almost all today's System-on-Chip (SoC) connecting different components: the main chip to its Inputs/Outputs (I/Os), the main chip to a companion chip, Inter-Processor Communication (IPC) and etc… Serial memory might even be the successor of current DDR memories.However, going from parallel links to high-speed serial links presents many challenges; HSSLs must run at higher speeds reaching many gigabits per second to maintain the same end-to-end throughput as parallel links as well as satisfying the exponential increase in the demand for throughput. The signal's attenuation over copper increases with the frequency, requiring more equalizers and filtering techniques, thereby increasing the design complexity and the power consumption.One way to optimize the design at high speeds is to embed the clock within the data, because a clock line means more routing surface, and it also can be source to high EMI. Another good reason to use an embedded clock is that the skew (time mismatch between the clock and the data lanes) becomes hard to control at high frequencies. Transitions must then be ensured inside the data that is sent on the line, for the receiver to be able to synchronize and recover the data correctly. In other words, the number of Consecutive Identical Bits (CIBs) also called the Run Length (RL) must be reduced or bounded to a certain limit.Another challenge and characteristic that must be bounded or reduced in the data to send on a HSSL is the difference between the number of ‘0' bits and ‘1' bits. It is called the Running Disparity (RD). Big differences between 1's and 0's could shift the signal from the reference line. This phenomenon is known as Base-Line Wander (BLW) that could increase the BER (Bit Error Rate) and require filtering or equalizing techniques to be corrected at the receiver, increasing its complexity and power consumption.In order to ensure a bounded Run Length and Running Disparity, the data to be transmitted is generally encoded. The encoding procedure is also called line coding. Over time, many encoding methods were presented and used in the standards; some present very good characteristics but at the cost of high additional bits, also called bandwidth overhead, others have low or no overhead but do not ensure the same RL and RD bounds, thus requiring more analog design complexity and increasing the power consumption.In this thesis, we propose a novel programmable line coding that can perform to the desired RL and RD bounds with a very low overhead, down to 10 times lower that the existing used encodings and for the same bounds. First, we show how we can obtain a very low overhead RL limited line coding, and second we propose a very low overhead method which bounds the RD, and then we show how we can combine both techniques in order to build a low overhead, Run Length Limited, and Running Disparity bounded Line Coding

ITC/USA 2009 Conference Proceedings / The Forty-Fifth Annual International Telemetering Conference and Technical Exhibition / October 26-29, 2009 / Riviera Hotel & Convention Center, Las Vegas, Nevada / With the emergence of higher bandwidth Ethernet networks on ranges, many ranges are converting their data transport from ATM(Asynchronous Transfer Mode) networks to Ethernet networks. Both networks have their respective advantages and disadvantages, however one reoccurring issue is product interoperability. The RCC (Range Commanders Council) TTG (Telecommunications and Timing Group) created the Telemetry over IP (TMoIP 218-07) solution with input from various ranges and vendors to solve this issue. This specification allows ranges to use different vendors together for Telemetry over Ethernet, based on specific needs at each site. This paper targets those who are thinking about converting from ATM to Ethernet networks.

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