• Refine Query
  • Source
  • Publication year
  • to
  • Language
  • 108
  • 11
  • 11
  • 4
  • 1
  • 1
  • 1
  • 1
  • 1
  • 1
  • 1
  • 1
  • 1
  • Tagged with
  • 153
  • 153
  • 153
  • 153
  • 50
  • 46
  • 46
  • 24
  • 24
  • 23
  • 21
  • 20
  • 19
  • 17
  • 16
  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
151

Projeto e implementação de método para conexão paralela de UPSs com compartilhamento de potência

Annunziato, Rafael Christiano 31 August 2012 (has links)
Este trabalho apresenta o projeto e a implementação prática de um método completo para ser utilizado na conexão de UPSs monofásicos em paralelo. Existe um algoritmo que executa o droop de fase/frequência, e um novo método que trabalha com e sem comunicação de dados entre os inversores. Quando a comunicação está ativa, um novo algoritmo é utilizado, inserindo um resistência virtual variável, junto com o compartilhamento de potência ativa, obtendo um baixo valor de THD (Total Harmonic Distortion) na tensão de saída e bom compartilhamento de potência. Quando a comunicação de dados não funciona, uma resistência virtual constante é inserida, aumentando a THD de saída com carga não-linear, mas ainda proporcionando um bom compartilhamento de potência ativa. A vantagem é poder obter um bom desempenho quando a comunicação de dados está operando, mas, no caso de sua falha, o sistema ainda funciona, proporcionando maior confiabilidade. A implementação possui um algoritmo de emulação de carga eletrônica, com o propósito de executar testes de produção, baseado no mesmo algoritmo de paralelismo, apenas mudando algumas variáveis. / This work presents the design and experimental implementation of a complete paralleling method to be used for parallel single-phase UPSs connection. There is a algorithm that performs a phase/frequency droop, and a new method to work with or without data communication among the inverters. When communication is working, a new algorithm is used, inserting a variable virtual resistance in the output, along with active power sharing, obtaining a low output voltage THD (Total Harmonic Distortion) value and good power sharing. Without communication a constant virtual resistance is inserted, increasing the output THD with non-linear load, but still allowing a good active power sharing. The advantage is to obtain a good performance operation with communication, but, in case of communication failure, the system still works providing more reliability. The implementation have a electronic load emulation algorithm, with purpose to execute factory tests, based in the same parallelism algorithm, just changing some variables.
152

A Runtime Framework for Regular and Irregular Message-Driven Parallel Applications on GPU Systems

Rengasamy, Vasudevan January 2014 (has links) (PDF)
The effective use of GPUs for accelerating applications depends on a number of factors including effective asynchronous use of heterogeneous resources, reducing data transfer between CPU and GPU, increasing occupancy of GPU kernels, overlapping data transfers with computations, reducing GPU idling and kernel optimizations. Overcoming these challenges require considerable effort on the part of the application developers. Most optimization strategies are often proposed and tuned specifically for individual applications. Message-driven executions with over-decomposition of tasks constitute an important model for parallel programming and provide multiple benefits including communication-computation overlap and reduced idling on resources. Charm++ is one such message-driven language which employs over decomposition of tasks, computation-communication overlap and a measurement-based load balancer to achieve high CPU utilization. This research has developed an adaptive runtime framework for efficient executions of Charm++ message-driven parallel applications on GPU systems. In the first part of our research, we have developed a runtime framework, G-Charm with the focus primarily on optimizing regular applications. At runtime, G-Charm automatically combines multiple small GPU tasks into a single larger kernel which reduces the number of kernel invocations while improving CUDA occupancy. G-Charm also enables reuse of existing data in GPU global memory, performs GPU memory management and dynamic scheduling of tasks across CPU and GPU in order to reduce idle time. In order to combine the partial results obtained from the computations performed on CPU and GPU, G-Charm allows the user to specify an operator using which the partial results are combined at runtime. We also perform compile time code generation to reduce programming overhead. For Cholesky factorization, a regular parallel application, G-Charm provides 14% improvement over a highly tuned implementation. In the second part of our research, we extended our runtime to overcome the challenges presented by irregular applications such as a periodic generation of tasks, irregular memory access patterns and varying workloads during application execution. We developed models for deciding the number of tasks that can be combined into a kernel based on the rate of task generation, and the GPU occupancy of the tasks. For irregular applications, data reuse results in uncoalesced GPU memory access. We evaluated the effect of altering the global memory access pattern in improving coalesced access. We’ve also developed adaptive methods for hybrid execution on CPU and GPU wherein we consider the varying workloads while scheduling tasks across the CPU and GPU. We demonstrate that our dynamic strategies result in 8-38% reduction in execution times for an N-body simulation application and a molecular dynamics application over the corresponding static strategies that are amenable for regular applications.
153

Machine Vision Assisted In Situ Ichthyoplankton Imaging System

Iyer, Neeraj 12 July 2013 (has links)
Indiana University-Purdue University Indianapolis (IUPUI) / Recently there has been a lot of effort in developing systems for sampling and automatically classifying plankton from the oceans. Existing methods assume the specimens have already been precisely segmented, or aim at analyzing images containing single specimen (extraction of their features and/or recognition of specimens as single targets in-focus in small images). The resolution in the existing systems is limiting. Our goal is to develop automated, very high resolution image sensing of critically important, yet under-sampled, components of the planktonic community by addressing both the physical sensing system (e.g. camera, lighting, depth of field), as well as crucial image extraction and recognition routines. The objective of this thesis is to develop a framework that aims at (i) the detection and segmentation of all organisms of interest automatically, directly from the raw data, while filtering out the noise and out-of-focus instances, (ii) extract the best features from images and (iii) identify and classify the plankton species. Our approach focusses on utilizing the full computational power of a multicore system by implementing a parallel programming approach that can process large volumes of high resolution plankton images obtained from our newly designed imaging system (In Situ Ichthyoplankton Imaging System (ISIIS)). We compare some of the widely used segmentation methods with emphasis on accuracy and speed to find the one that works best on our data. We design a robust, scalable, fully automated system for high-throughput processing of the ISIIS imagery.

Page generated in 0.0388 seconds