D.Ing. (Electrical & Electronic Engineering) / Please refer to full text to view abstract

M.Ing. (Mechanical Engineering) / Please refer to full text to view abstract

D.Ing. (Electrical & Electronic Engineering) / Please refer to full text to view abstract

D.Ing. (Electrical and Electronics Engineering) / This thesis treats aspects of the modelling techniques required for Computer Aided Design (CAD) of electromagnetically integrated structures for use in power electronic networks. The concept of structural impedance is introduced and developed, building on transmission line theory. Computer based methods for calculating the distributed parameters of a given structure are investigated. These methods are the Finite Element Method and the Incremental Method. Based on the structural impedance lumped element equivalent circuit models for interconnections are developed for modelling of the distributed energy storage effects associated with a physical circuit as part of a lumped element network that can be submitted to circuit simulation programs like SPICE. The models are used in SPICE circuit simulations of power circuits and the simulated results are verified experimentally. Circuit level simulation models for switches are investigated in order to determine the complexity and detail of models suitable for CAD of complete converter topologies. A classification scheme for circuit models of switches is developed as an aid in selection of suitable models for particular simulation purposes. A DC circuit model for power BJT's is developed as a theoretical exercise to determine the requirements, with regard to development time and computational resources, for application of a particular switch model. It is based on new ideas in an attempt to model the effects of power BJT operation of interest to power electronic circuit designers while decreasing the calculation requirements in comparison with sophisticated device physics based models normally used or over simplified models. Finally suggestions are made with regard to a new way of approaching the optimization of power conditioning circuits by using power flow as the basis. This includes the novel use of specially manufactured high permittivity dielectric materials to adjust the characteristic impedance of connections to obtain optimal operation under particular operating conditions.

High power circuits, those involving high levels of voltages and currents to produce several kilowatts of power, would possess an optimized efficiency when driven at high frequencies (on the order of MHz). Such an approach would greatly reduce the size of capacitive and magnetic components, and thus ultimately reduce the cost of the power electronic circuits. The problem with this strategy in conventional packaging, however, is that at high frequencies, interconnects between the power devices on one board (such as Power MOSFETs or IGBTs) and components on another board (such as the coasting diodes) suffer from severe parasitic effects, thus affecting the overall electrical performance of the system. A conceivable solution to this problem is the design and construction of a power electronics module which would incorporate all power devices and supporting circuitry into one very simple and compact module. Such an approach would reduce interconnect inductances (thus reducing costly parasitic effects), increase system efficiency and electrical performance, produce a standardization for power electronic modules, and through this standardization, lower overall industry-wide system costs and increase power electronic system reliability. This technology would prove especially valuable for power electronics in industry, where prevalent power systems such as half bridge or full bridge converters would benefit greatly from the large reduction of inductances which currently exist between separate bridge legs. This thesis will discuss a novel multilayer approach towards the described issues. A power module has been designed and fabricated which contains one metallization power layer for the power devices, and a second metallization control layer for the low power signal components. The two layers are separated by a dielectric layer which serves as an electrical separation and as a physical spacer. In addition, issues have been addressed towards optimal physical layout and construction (with regards to thermal dissipation), materials comparisons have been made, and thermal simulations and experimental verifications performed. Issues relating to standardized power electronic module design and the efforts of this researcher at the Microelectronics Laboratories at Virginia Polytechnic Institute and State University to contribute to this quickly evolving field will be discussed. Such topics as power electronic module design, control and driver circuitry design, material issues, and thermal issues will be discussed. / Master of Science

This thesis presents and investigates Space Vector Modulation (SVM) switching strategies for (i) a multi-level Diode-Clamped Converter (DCC) and (ii) a multi-module Voltage-Sourced Converter (VSC) system in which each module is a conventional two-level VSC. Although the SVM strategies are general and applicable for n-level DCC and n-module VSC systems, this text only concentrates on five-level DCC and four-module VSC systems. For a five-level DCC, a computationally efficient SVM algorithm is proposed. The algorithm, that is based on a classifier Neural Network (NN), reduces the computational time for the SVM realization. Therefore, adequate saving of processor execution time, in each sampling period of SVM, is provided to carry out other functions, e.g. the calculations required for DC-capacitor voltage balancing task. The thesis also proposes a DC-capacitor voltage balancing strategy to counteract the voltage drift phenomenon of (i) a passive-front-end five-level DCC, and (ii) a back-to-back connected five-level DCC system. The proposed balancing strategy, that is based on augmenting the proposed SVM algorithm, takes advantage of the redundant switching states to minimize a quadratic cost function associated with voltage deviations of the DC-capacitors. The salient features of the proposed balancing strategy are (i) online calculation of SVM to select the best switching states, (ii) minimization of switching frequency, (iii) minimization of the THD content of the AC-side voltage, and (iv) no requirement for additional power circuitry. For a four-module VSC system a sequential sampling SVM strategy is proposed. The proposed strategy (i) provides harmonic cancellation/minimization at the net AC-side voltage of the multi-module VSC system, and (ii) offers a low switching frequency for each VSC module. Technical feasibility of the proposed SVM strategies for a five-level DCC and a four-module VSC system, as a STATCOM and a back-to-back HVDC system, are investigated and presented. The studies are conducted in the time-domain, in the PSCAD/EMTDC software environment.

M.Ing. / During mineral exploration a whole lot of different exploration techniques can be applied. In this thesis the instrumentation used for electromagnetic surveying, which is only one of the prospecting techniques, is inspected. In particular the thesis will be about the transmitter of the single transmitter wide band receiver airborne electromagnetic prospecting system. A new power electronic topology is proposed in order to improve this transmitter. Before this is done a reference is first established. This is done in the form of the exponential transition inverter, which is the inverter that is currently applied as transmitter in South-Africa. Another reason for looking at this circuit topology is because it is the simplest way to realize the transmitter. During the analysis of this inverter topology all the proporties of the transmitter as a whole is also investigated. The main component of the transmitter, namely the transmitter coil is also discussed. This is followed by a summary of the properties of the exponential transition inverter in which the main shortcomings of this transmitter is discussed. The greatest of which is surely that pliable frequency spectra cannot be obtained. Subsequently resonance is viewed as a solution to the shortcomings. The main contribution of this is that the pliability of the frequency spectrum can be increased, because the capasitor in this circuit can easily be changed. It is however shown that a purely resonant circuit on it's own, also is not the solution. This leads to the improved inverter topology for the transmitter, namely the Kwasi resonant inverter. It is shown in detail that the Kwasi resonant inverter is a much beter option as transmitter then the exponential transient inverter. Since this circuit also has a capacitor in it, it is shown that pliable frequency spectra can be obtained. It is futher shown how the pliability of the frequency spectrum can be improved even more by deviating from conventional methods of switch control. Mathematical analysis, as well as an experimental setup, of the different inverter topologies, are used to illustrate all of the above mentioned. As a conclusion the only drawback of the Kwasi resonant inverter, namely high voltage peaks, is addressed. A solution to this problem is proposed in the form of two different voltage clamps. The best one of the two is identified and also implemented.

Thesis is submitted in fulfilment of the requirements for the degree of Master of Science in Engineering to the Faculty of Engineering and Built Environment, University of the Witwatersrand, Johannesburg 2018 / Power electronic converters that convert DC to AC, or vice versa, require an energy buffer between the AC and DC ports of the converter to compensate for the instantaneous power mismatch. Electrolytic capacitors are mostly used for these buffering applications because of the high energy density when compared to other capacitors, but unfortunately this type of capacitor also has low reliability. This dissertation proposes a general solution from a fundamental approach to solve the required capacitor power requirements on the DC-bus of an inverter. From the resulting model, an alternative active filter design technique to reduce the required capacitance of the DC-bus capacitor of a single phase inverter is presented. In this model, the minimum and maximum voltages of the capacitor can be chosen and the corresponding waveforms are calculated. An optimum region for the choice of capacitor voltage is shown to visually illustrate the trade-offs between the capacitor voltage, capacitance and converter losses. In this optimum area the reduction in capacitance is enough to allow the elimination of electrolytic capacitors, while maintaining comparable volume. In this technique, the DC-bus capacitor is decoupled from the DC-bus to allow wide voltage variation and the power processed by the capacitor is directly controlled, instead of the bus voltage. The allowable voltage variation of the capacitor can also be selected to fit the application or traded off in favour of capacitance as chosen by the designer. This general solution is applicable to any bi-directional converter used to decouple the capacitor from the DC-Bus / XL2018

prepared by Ling Hok Sun, Lawrence. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1998. / Abstract also in Chinese. / Chapter 1. --- Abstract --- p.2 / Chapter 2. --- Introduction --- p.3 / Chapter 3. --- Circuit Description --- p.8 / Chapter 4. --- Technology' --- p.10 / Chapter 5. --- Design --- p.13 / Chapter 5.1 --- TOP LEVEL --- p.13 / Chapter 5.2 --- Logic --- p.14 / Chapter 5.3 --- Tuner --- p.19 / Chapter 5.4 --- Gate Drive and Power Switch --- p.26 / Chapter 5.5 --- Full-Circuit Simulation --- p.43 / Chapter 6. --- Layout --- p.53 / Chapter 7. --- Characterization --- p.55 / Chapter 8. --- Conclusion --- p.65 / Chapter 9. --- Reference --- p.66 / Chapter 10. --- Appendix --- p.67

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