This dissertation systematically explores multiple-input converters (MICs) configuration and topologies, and then proposes improvements on certain beneficial MICs—time-sharing MICs and soft-switching MICs for distributed generation (DG) applications with high voltage transfer ratio. Compared with other MIC families which are derived from same input and output cells, time-sharing MICs have the fewest circuit components. However, time-sharing MICs lack for bi-directional power flow capability due to their special input switches requirement. In addition, their hard-switching characteristic leads to a low efficiency problem when isolation is necessary. The dissertation investigates into time-sharing MIC input switch selection, which leads to a new driving strategy and new input switch combinations. With the new input switch combinations, bi-directional and high efficiency time-sharing MICs are made possible. Besides isolated time-sharing MIC, Soft-switching MICs might also be a common choice for high voltage transfer ratio DG applications. However, the enormous amount of circuit components makes the soft-switching MICs become less attractive. An input cell reduction method is introduced in this dissertation to greatly reduce the component count of isolated MICs, including soft-switching MICs. In addition to the improvement on existing MIC families, a new push-pull connected MIC family is proposed in this dissertation as another choice of high voltage transfer ratio DG applications. Moreover, a comparison among MIC families is made to provide a sense of topologies selection in certain applications. Prototypes of time-sharing dual-input (DI) SEPICs, a push-pull connected DI-Boost converter, and a DI full-bridge (FB) converter are built to verify aspects discussed in this dissertation. Bi-directional power flow capability of time-sharing MIC is confirmed with a time-sharing DI-SEPIC and a soft-switching time-sharing MIC is realized by an isolated time-sharing DI-SEPIC with an active clamping leg. Maximum power point tracking control feasibility in these converters is evaluated with real photovoltaic modules that are connected to the push-pull connected DI-Boost converter that uses a perturb-and-observe method. Finally, an efficiency comparison is made between time-sharing MIC and push-pull connected MIC. / text

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The fully-pitched winding arrangement is one of the most radical changes in the design of doubly-salient reluctance motors in recent times. By replacing conventional shortpitched windings with fully-pitched windings, the resulting machine has a strong and position dependant mutual coupling between phases. The major torque producing mechanism is due to changes in mutual inductance with rotor position. This enables the windings to be better utilised, and with correct selection of excitation all phases can contribute useful torque all of the time. The increased winding utilisation requires a lower MMF per phase in comparison with a short-pitch wound machine with a single phase excited. Given a suitable winding configuration and machine dimensions, the copper losses for a given torque can be significantly lower than an equivalent conventional switched reluctance machine. Operation of a three phase fully-pitched winding switched reluctance machine has been studied theoretically, in simulation and experimentally. The experimental drive comprises of a D132 frame 12:8 machine, IGBT power converter and DSP controller. Operation with unipolar phase currents has been investigated over a wide speed range and performance compared with a conventional switched reluctance machine. Bipolar operation with several different excitation patterns has been investigated. Unipolar operation gives the largest torque/speed envelope with a simple controller, although bipolar modes can equal this with a more complex controller. Results show that for equal RMS phase current the average torque produced by four different modes of excitation are approximately equal. However, there is a large difference in the torque ripple and acoustic noise performance of each mode. Current control in switched reluctance machines is complicated by the non-linear nature of the load. By controlling flux-linkage rather than current a linear load model can be used. A discrete time 'dead-beat' flux-linkage controller has been implemented which gives superior phase current control performance to other types of controller with the same sample interval. A new method of constant torque operation based on 'flux ramps' has been proposed. This method gives predictable performance and enables constant torque operation over a wide speed range. A Genetic Algorithm has been shown to be very effective when applied to the problem of optimising the 'flux ramps' for minimum torque ripple. A speed controller has been implemented which makes use of the Genetic Algorithm optimised flux ramps to give smooth torque over a wide speed range.

This thesis presents and investigates Space Vector Modulation (SVM) switching strategies for (i) a multi-level Diode-Clamped Converter (DCC) and (ii) a multi-module Voltage-Sourced Converter (VSC) system in which each module is a conventional two-level VSC. Although the SVM strategies are general and applicable for n-level DCC and n-module VSC systems, this text only concentrates on five-level DCC and four-module VSC systems. For a five-level DCC, a computationally efficient SVM algorithm is proposed. The algorithm, that is based on a classifier Neural Network (NN), reduces the computational time for the SVM realization. Therefore, adequate saving of processor execution time, in each sampling period of SVM, is provided to carry out other functions, e.g. the calculations required for DC-capacitor voltage balancing task. The thesis also proposes a DC-capacitor voltage balancing strategy to counteract the voltage drift phenomenon of (i) a passive-front-end five-level DCC, and (ii) a back-to-back connected five-level DCC system. The proposed balancing strategy, that is based on augmenting the proposed SVM algorithm, takes advantage of the redundant switching states to minimize a quadratic cost function associated with voltage deviations of the DC-capacitors. The salient features of the proposed balancing strategy are (i) online calculation of SVM to select the best switching states, (ii) minimization of switching frequency, (iii) minimization of the THD content of the AC-side voltage, and (iv) no requirement for additional power circuitry. For a four-module VSC system a sequential sampling SVM strategy is proposed. The proposed strategy (i) provides harmonic cancellation/minimization at the net AC-side voltage of the multi-module VSC system, and (ii) offers a low switching frequency for each VSC module. Technical feasibility of the proposed SVM strategies for a five-level DCC and a four-module VSC system, as a STATCOM and a back-to-back HVDC system, are investigated and presented. The studies are conducted in the time-domain, in the PSCAD/EMTDC software environment.

Thesis (Ph. D.)--University of Canterbury, 2007. / Typescript (photocopy). "January 2007." Includes bibliographical references (p. [155]-161). Also available via the World Wide Web.

Thesis (Ph.D.)--University of Texas at Dallas, 2007. / Includes vita. Includes bibliographical references (leaves 158-163)

Thesis (Ph. D.)--Oregon State University, 2008. / Printout. Includes bibliographical references (leaves 175-181). Also available on the World Wide Web.

Thesis (Ph. D.)--Oregon State University, 2004. / Typescript (photocopy). Includes bibliographical references (leaves 100-103).