The objective of the proposed research is to design, fabricate, characterize and test silicon-embedded magnetic components for on-chip integrated power applications. Driven by the trend towards continued system multi-functionality and miniaturization, MEMS technology can be used to enable fabrication of three-dimensional (3-D) functional devices into the silicon bulk, taking advantage of the 'dead volume' in the substrate and achieving a greater level of miniaturization and integration. As an example, one of the challenges in realizing ultra-compact high-frequency power converters lies in the integration of magnetic components due to their relatively large volume. Embedding 3-D magnetic components within the wafer volume and implementing high-power, through-wafer interconnect for connection to circuitry on the wafer surface is a promising solution for achieving ultra-compact power converters, in which digital control circuitry and power switches are located on the wafer surface, and suitable magnetic components are embedded within the silicon substrate. In order to do this, key tasks in the following areas have been accomplished: development of new fabrication technologies for silicon embedding and 3-D structure realization; creation of high-current, through-wafer interconnects for connection of the device to circuitry; ability to incorporate a variety of magnetic materials when performance enhancement of the device is needed; exploration of a new design space for the devices due to ultra-compactness and silicon interaction; understanding of the complicated loss mechanisms in the embedded devices; and demonstration of device performance and in-circuit operation.

ITC/USA 2015 Conference Proceedings / The Fifty-First Annual International Telemetering Conference and Technical Exhibition / October 26-29, 2015 / Bally's Hotel & Convention Center, Las Vegas, NV / The U.S. Army Research Laboratory developed an on-board telemetry instrumentation system to obtain measurements of the in-flight dynamics of medium caliber projectiles. The small size, high launch acceleration, and extremely high spin rates of these projectiles created many design challenges. Particularly challenging were the high spin rates, necessitating the development of a data compression scheme for solar sensors. Flight tests successfully captured data for spin rates exceeding 1000 Hertz (1 kHz).

ITC/USA 2015 Conference Proceedings / The Fifty-First Annual International Telemetering Conference and Technical Exhibition / October 26-29, 2015 / Bally's Hotel & Convention Center, Las Vegas, NV / Power supply is the most critical unit in an airplane. A defect in a power supply might lead to a crash. Therefore, it is very useful and important to monitor the status of the airplane's power supply during flight. This paper presents a real-time evaluation system constructed by a central process unit for processing and detecting defects and several remote units for acquiring parameters. Because of the huge amount of data acquired, a combination of Ethernet and time division multiplexing technique has been applied for constructing a 2.5Gbps synchronous data transportation network for the system.

Contact-less transfer of energy has always been a desired feature for systems that require reliable and durable power transfer across their moving parts. In rotary equipment in particular, slip-rings are the established solution with off-the-shelf and customised solutions readily available in the market. Despite the mature technology, slip-rings suffer wear and are prone to arcing, making frequent maintenance a necessity. In this project a rotating transformer is proposed as an alternative solution for contact-less transfer of energy across the revolving frame of an airborne electronic-scanning radar. This thesis is based on the hypothesis that the Phase-Shifted Full Bridge (PSFB) topology can efectively utilise the parasitic components of the rotating transformer to achieve efficient (over 90%) power conversion at the kW range. The first part of this work concentrates on the study of the magnetic interface and its electrical properties. Initially the magnetic structure of the transformer is studied in order to gain understanding of the effects of the physical layout of the component to its electrical behaviour. The problems of low magnetising and increased leakage inductance are quantified by measurements, calculations and finite element analysis. An accurate electrical model is built and used to calculate the transformer voltage and current gain. The second part of the research programme aims at the compilation of a design strategy for a PSFB incorporating a rotating transformer. An algorithm is presented, that optimises the magnetic component structure in order to achieve minimum switching losses and spread the conduction losses between the transformer and power switches. The last stage involves the evaluation of the design algorithm through prototyping and testing. Some topological variations are tested and compared with the original conventional PSFB converter. The thesis concludes with a discussion of the results and future challenges.

Orientador: Leonardo Nepomuceno / Banca: Marcelo Augusto Cicogna / Banca: Edlaine Martins Soler / Resumo: Neste trabalho propõe-se um modelo de leilão multiperíodo para um mercado pool do dia seguinte de sistemas hidrotérmicos, que leve em consideração as restrições intertemporais do sistema termelétrico (e.g. potência máxima disponível e limites de rampa e período mínimo de operação e desligamento) e restrições hidráulicas (e.g. defluência, volume e balanço de água, altura de queda, alturas de montante e jusante do reservatório, limites de rampa de vazão defluente e função de produção). Também foram introduzidas no modelo as restrições de rede de transmissão, tais como o balanço e limites de fluxo de potência e representação das perdas. São descritas as técnicas de linearização das funções de altura de queda líquida, função de produção e função de perdas no sistema de transmissão. O modelo proposto é formulado como um problema de programação linear inteiro-misto, tendo sido resolvido utilizando as plataformas GAMS - CPLEX e IBM ILOG CPLEX Optimization Studio. Os resultados apresentados têm como foco principal a análise do impacto das restrições hidráulicas nos preços de equilíbrio de mercado e no despacho de geração de sistemas hidrotérmicos. Mostra-se que a operação de uma cascata hidráulica para o dia seguinte é orientada com base nas ofertas fornecidas pelas companhias geradoras no mercado de energia. / Abstract: This work presents a brief description of an energy market structure, as well as its agents, economic division and service and time horizon classification. The Brazilian mar-ket, single-period and multiperiod auction are also described, as much as a concise presen-tation of a hydroelectric generation system. It's proposed for a day-ahead pool market, a multiperiod auction for hydrothermal system which takes into account the intertempo-ral constraints from a thermoelectric system (e.g. maximum available power output and ramp rate limits, minimum up and down time) and hydraulic constraints (e.g. defluence, volume and water balance, net head, forebay and tailrace levels of reservoir, water release ramp rate limits and the unit performance curves). It was also associated to the problem the transmission constraints, such as balance and flow power limits and power loss. On account of being a problem with such features, the linearization techniques of the net head, unit performance curves and power loss function are described. The proposed mo-del is based on a mixed integer linear programming problem, which used the GAMS -CPLEX and IBM ILOG CPLEX Optimization Studio to its resolution. Finally there are two reported situations to analyze the impact of the hydraulic constrains on the bidding prices, as well as the in˛uence of the selling prices on the total spillage of the hydroelectric plants. The model is projected for a hydro predominance plant cascade. / Mestre

Nanofibres are useful in a broad range of applications in areas such as medical science, food science, materials engineering, environmental engineering, and energy and electronics due to their outstanding characteristics: their small size, high surface-to-volume ratio, high porosity, and superior mechanical performance. Recently, controlled drug delivery systems have gained significant attention, especially with respect to the use of polymer nanofibres. For these systems, the ability to control of the length of the polymer nanofibre is important because the amount of drug released depends on the length of the fibre. Electrospinning is the simplest and most cost-effective method of fabricating polymer nanofibres. In the process, a high voltage is used to create an electrified jet which will eventually become a nanofibre. The electrified jet ejects when a high voltage is applied to the electrospinning setup. On the other hand, the jet does not eject when the applied voltage is below the threshold voltage. It is therefore possible to fabricate and chop nanofibres by controlling the values of the voltages applied and a special high-voltage pulsed power supply has been developed for this purpose. In this research, an IGBT-based pulsed power supply has been designed and built to be used for non-continuous-mode electrospinning. The IGBTs are connected in series to deliver high voltage pulse voltages to an electrospinning setup. The IGBT-based pulsed power supply is capable of producing controllable square pulses with a width of a few hundred microseconds to DC and amplitudes up to 10 kV. The technique of non-continuous-mode electrospinning was tested using the pulsed power supply designed in this work. The new system was able to fabricate and chop nanofibres with PEO and alginate/PEO solutions. It was concluded that the minimum pulse width that can initiate an electrified jet is approximately 80 ms for the parameters used in this study. A longer period produces a more constant jet during the pulse-on voltage when the duty ratio is the same value. It is also highly likely that a jet is always ejected during the pulse-on voltage when the duty ratio is more than 40 %.

Nanofibres are useful in a broad range of applications in areas such as medical science, food science, materials engineering, environmental engineering, and energy and electronics due to their outstanding characteristics: their small size, high surface-to-volume ratio, high porosity, and superior mechanical performance. Recently, controlled drug delivery systems have gained significant attention, especially with respect to the use of polymer nanofibres. For these systems, the ability to control of the length of the polymer nanofibre is important because the amount of drug released depends on the length of the fibre. Electrospinning is the simplest and most cost-effective method of fabricating polymer nanofibres. In the process, a high voltage is used to create an electrified jet which will eventually become a nanofibre. The electrified jet ejects when a high voltage is applied to the electrospinning setup. On the other hand, the jet does not eject when the applied voltage is below the threshold voltage. It is therefore possible to fabricate and chop nanofibres by controlling the values of the voltages applied and a special high-voltage pulsed power supply has been developed for this purpose. In this research, an IGBT-based pulsed power supply has been designed and built to be used for non-continuous-mode electrospinning. The IGBTs are connected in series to deliver high voltage pulse voltages to an electrospinning setup. The IGBT-based pulsed power supply is capable of producing controllable square pulses with a width of a few hundred microseconds to DC and amplitudes up to 10 kV. The technique of non-continuous-mode electrospinning was tested using the pulsed power supply designed in this work. The new system was able to fabricate and chop nanofibres with PEO and alginate/PEO solutions. It was concluded that the minimum pulse width that can initiate an electrified jet is approximately 80 ms for the parameters used in this study. A longer period produces a more constant jet during the pulse-on voltage when the duty ratio is the same value. It is also highly likely that a jet is always ejected during the pulse-on voltage when the duty ratio is more than 40 %.

Design metrics such as area, timing and power are generally considered as the primary criteria in the design of modern day circuits, however, the minimization of power supply noise, among other noise sources, is appreciably more important since not only can it cause a degradation in these parameters but can cause entire chips to fail. Ensuring the integrity of the power supply voltage in the power distribution network of a chip is therefore crucial to both building reliable circuits as well as preventing circuit performance degradation. Power supply noise concerns, predicted over two decades ago, continue to draw significant attention, and with present CMOS technology projected to keep on scaling, it is shown in this work that these issues are not expected to diminish. This research also considers the management and on-chip detection of power supply noise. There are various methods of managing power supply noise, with the use of decoupling capacitors being the most common technique for suppressing the noise. An in-depth analysis of decap structures including scaling effects is presented in this work with corroborating silicon results. The applicability of various decaps for given design constraints is provided. It is shown that MOS-metal hybrid structures can provide a significant increase in capacitance per unit area compared to traditional structures and will continue to be an important structure as technology continues to scale. Noise suppression by means of current shifting within the clock period of an ALU block is further shown to be an additional method of reducing the minimum voltage observed on its associated supply. A simple, and area and power efficient technique for on-chip supply noise detection is also proposed.

The power supply for electronic devises is demanded to be lighter and smaller in nowadays market. Therefore, the cooling problem becomes the major design challenge due to reduced heat transfer area. In this thesis, a numerical computation method is employed to numerically simulate the natural convection heat transfer field for a small power supply placed on the ground or table in atmospheric conditions. The effects of parameters are studied including internal heat sink structure, shell structure, heat rate of generation, body size and ground material. The results of the present study can provide design reference.

As technology scales into the Deep Sub-Micron (DSM) regime, circuit designs have become more and more sensitive to power supply noise. Excessive noise can significantly affect the timing performance of DSM designs and cause non-trivial additional delay. In delay test generation, test compaction and test fill techniques can produce excessive power supply noise. This will eventually result in delay test overkill. To reduce this overkill, we propose a low-cost pattern-dependent approach to analyze noise-induced delay variation for each delay test pattern applied to the design. Two noise models have been proposed to address array bond and wire bond power supply networks, and they are experimentally validated and compared. Delay model is then applied to calculate path delay under noise. This analysis approach can be integrated into static test compaction or test fill tools to control supply noise level of delay tests. We also propose an algorithm to predict transition count of a circuit, which can be applied to control switching activity during dynamic compaction. Experiments have been performed on ISCAS89 benchmark circuits. Results show that compacted delay test patterns generated by our compaction tool can meet a moderate noise or delay constraint with only a small increase in compacted test set size. Take the benchmark circuit s38417 for example: a 10% delay increase constraint only results in 1.6% increase in compacted test set size in our experiments. In addition, different test fill techniques have a significant impact on path delay. In our work, a test fill tool with supply noise analysis has been developed to compare several test fill techniques, and results show that the test fill strategy significant affect switching activity, power supply noise and delay. For instance, patterns with minimum transition fill produce less noise-induced delay than random fill. Silicon results also show that test patterns filled in different ways can cause as much as 14% delay variation on target paths. In conclusion, we must take noise into consideration when delay test patterns are generated.