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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Design and Implementation of Transformer-Based Balanced Passive Components on CMOS and Printed Circuit Substrates

Chen, Yong-Jun 12 July 2010 (has links)
This thesis aims to design transformer-based balanced passive components with high performance and compact size using CMOS and printed-circuit¡Vboard (PCB) technologies. A CMOS parallel-combining transformer (PCT) incorporating a planar trifilar transformer is presented to realize power combining and impedance transformation at the same time. In addition, a CMOS Wilkinson power combiner with a planar bifilar transformer is proposed to enhance isolation between two combining ports. Several transformer coupled balun designs with an overlay winding structure are carried out on FR4 and Duroid substrates. These designs uses a rather symmetric layout to achieve a superior balance performance and a multilayer configuration to create the transmission zeros in the out-of-band response. Finally, a CMOS transformer balun is implemented with a bandpass filter passband which is designed according to the coupled resonator filter theory. This passband can restrict the bandwidth usage for the balun to improve the common-mode rejection ratio (CMRR) within the passband.
2

Implementation of a Microstrip Square Planar N-Way Metamaterial Power Divider

Zong, Junyao January 2008 (has links)
The work done in this thesis focuses on the design of a square-shaped 20-way metamaterial power divider which is fabricated in microstrip technology and operates at 1 GHz. The divider comprises 12 square-shaped left-handed unit cells and 13 square-shaped right-handed unit cells, and these unit cells have the same size and are placed in a checker-board tessellation, where the left-handed unit cells are connected only to right-handed unit cells and vice versa. The divider is based upon the infinite wavelength phenomenon in two-dimensions, and this means that the insertion phase between any two ports of the left-handed unit cell is equal, but with opposite sign, to that of the right-handed unit cell. The divider gives an equal-amplitude equal-phase power division from the central input port to the output ports which are located on a straight line on each side. Thus, it is convenient to integrate with, or interconnect to, other planar circuits in a system, such as power amplifier modules. The design concept can be extended to an N-way power divider, where N = 4n and n is an odd integer.
3

CMOS linear RF power amplifier with fully integrated power combining transformer / Um amplificador de potência RFCMOS linear com combinador de potência totalmente integrado

Guimarães, Gabriel Teófilo Neves January 2017 (has links)
Este trabalho apresenta o projeto de um amplificador de potência (PA) de rádio-frequência (RF) linear em tecnologia complementar metal-oxido silício (CMOS). Nele são analisados os desafios encontrados no projeto de PAs CMOS assim como soluções encontradas no estado-da-arte. Um destes desafios apresentados pela tecnologia é a baixa tensão de alimentação e passivos com alta perda, o que limita a potência de saída e a eficiência possível de ser atingida com métodos tradicionais de projeto de PA e suas redes de transformação de impedância. Este problema é solucionado através do uso de redes de combinação de impedância integradas, como a usada neste trabalho chamada transformador combinador em série (SCT). Os problemas com o uso de tecnologia CMOS se tornam ainda mais críticos para padrões de comunicação que requerem alta linearidade como os usados para redes sem-fio locais (WLAN) ou padrões de telefonia móvel 3G e 4G. Tais protocolos requerem que o PA opere em uma potência menor do que seu ponto de operação ótimo, degradando sua eficiência. Técnicas de linearização como pré-distorção digital são usadas para aumentar a potência média transmitida. Uma ténica analógica de compensação de distorção AM-PM através da linearização da capacitância de porta dos transistores é usada neste trabalho. O processo de projeto é detalhado e evidencia as relações de compromisso em cada passo, particularmente o impacto da terminação de harmônicos e a qualidade dos passivos na rede de transformação de carga. O projeto do SCT é otimizado para sintonia da impedância de modo comum que é usada para terminar o segundo harmonico de tensão do amplificador. O amplificador projetado tem um único estágio devido a área do chip ser limitada a 1:57 x 1:57 mm2, fato que impacta seu desempenho. O PA foi analisado através de simulação numérica sob várias métricas. Ele atinge uma potência máxima de saída de 24:4 dBm com uma eficiência de dreno de 24:53% e Eficiência em adição de potência (PAE) de 22%. O PA possui uma curva de ganho plana em toda faixa ISM de 2.4 GHz, com magnitude de 15:8 0:1dB. O PA tem um ponto de compressão de OP1dB = 20:03 dBm e o sinal tem um defasamento não-linear de = 1:2o até esta potência de saída. Um teste de intermodulação de dois tons com potência 3dB abaixo do OP1dB tem como resultado uma relação entre intermodulação de terceira ordem e fundamental de IMD3 = 24:22 dB, e de quinta ordem inferior e superior e fundamental de IMD5Inferior = 48:16 dB e IMD5Superior = 49:8 dB. Por fim, mostra-se que o PA satisfaz os requerimentos para operar no padrão IEEE 802.11g. Ele atinge uma potência média de saída de 15:4 dBm apresentando uma magnitude do vetor erro (EVM) de 5:43%, ou 25:3 dB e satisfazendo a máscara de saída para todos os canais. / This work presents the design of a fully integrated Radio-frequency (RF) linear Power Amplifier( PA) in complementary metal-oxide silicon (CMOS) technology. In this work we analyse the challenges in CMOS PA design as well as the state-of-the-art solutions. One such challenge presented by this technology is the low supply voltage and high-loss passives, which pose severe limits on the output power and efficiency achieved with traditional PA design methods and load impedance transformation networks. This issue is addressed by the use of on-chip, highly efficient power combining networks such as the one in this work: A series combining transformer (SCT). The problem of using CMOS becomes even more critical for recent communications standards that require high transmitter linearity such as the ones used for wireless local area network (WLAN) or 3G and 4G mobile communications. This requirement is such that the PA operate at a high power back-off from its optimum operating point, degrading efficiency. To address this problem linearization techniques such as digital pre-distortion can be used in order to decrease the necessary power back-off. In this work an analog technique of AM-PM distortion compensation is used to linearize the capacitance at the input of the amplifier’s transistors and reduce this type of distortion that severely impacts the error vector magnitude (EVM) of the signal. The design process is detailed and aims to make evident the trade-offs of PA design and particularly the impact of harmonic termination and the quality of passives on the load transformation network, the series combining transformer design is optimized for common-mode impedance tuning used for 2nd harmonic termination. The circuit has only a single amplifying stage due to its area being limited to 1:57 x 1:57 mm2 and the design is very constrained by this fact. The PA simulated performance is analyzed under various metrics. It achieves a simulated maximum output power of 24:4 dBm with a drain efficiency of 24:53% and power added efficiency (PAE) of 22%. The PA has a very flat power gain of 15:8 0:1 dB throughout the 2.4 GHz industrial, scientific and medical (ISM) band and is unconditionally stable with 4:9. The PA has a compression point of OP1dB = 20:03 dBm and the signal has a non-linear phase shift of = 1:2o up to this output power. A two-tone intermodulation test with 3dB back-off from OP1dB has a ratio of third-order intermodulation to fundamental of IMD3 = 24:22 dB, and lower and upper fifth order intermodulation to fundamental of IMD5Lower = 48:16 dB and IMD5Upper = 49:8 dB. Finally the PA is shown to satisfy the requirements for operation within the institute of electrical and electronic engineers (IEEE) 802.11g standard. It achieves an average output power of 15:4 dBm while having an EVM of 5:43% or 25:3 dB while satisfying the output spectrum mask for all channels.
4

Medium frequency radar studies of meteors

Grant, Stephen Ian January 2003 (has links)
This thesis details the application of a medium frequency (MF) Doppler radar to observations of meteoroids entering the Earth's atmosphere. MF radars make possible a greater height coverage of the meteor region (70 to 160 km) than conventional meteor radars. However this type of radar has generally been under-utilised for meteor observations, primarily due to the less than ideal radio environment associated with MF systems. This situation demanded selection of the most appropriate radar meteor techniques and in this respect a variety of techniques are evaluated for application at this frequency. The 2 MHz radar system used in this study is located at the Buckland Park research facility (35.6 deg. S, 138.5 deg. E), near Adelaide, South Australia and is operated by the Department of Physics of the University of Adelaide. This radar has the largest antenna of any MF radar with 89 crossed dipoles distributed over an area of about 1 km in diameter. Beam forming is achieved by varying the phase to groups of elements of the array. The array was constructed in the 1960's, and while having several upgrades, a preliminary examination of the array and associated systems indicated that a significant amount of maintenance work would be required to enable the system to be used for meteor observations. It was also apparent that the software used with the radar hardware for atmospheric studies was not suitable for processing meteor data. Thus a major refurbishment of the radar hardware, as well as the development of appropriate software, was initiated. The complete radar system was divided into its constituent components of antenna array, transmitter, receiver and computer systems. The transmitter and receiver systems were examined and various improvements made including increasing total output power and enhancing beam steering capability. Time domain reflectometry (TDR) techniques were extensively used on the antenna array, as many feed cables showed the presence of moisture. New hardware in the form of a portable power combining system was designed, constructed and tested to further increase radar experimental capabilities. Techniques were developed that verified system performance was to specification. Extensive night time observations of sporadic and shower meteor events were made over a two and a half year period. A particular study was made of the Orionids shower as well as other meteor activity on the night of 22 October 2000. Using the upgraded beam swinging features of the array, a narrow radar beam was used to track the shower radiant in an orthogonal sense so as to maximise the number of shower meteors detected. From each echo, various intrinsic meteoroid parameters were determined, including meteor reflection point angle-of-arrival using a five-element interferometer, echo duration and height; meteoroid speeds were determined using the Fresnel phase time technique. Meteor echoes belonging to the Orionids radiant were selected using a coordinate transform technique. The speed was then used as an additional discriminant to confirm the Orionid shower members. A second radiant, observed at a slightly higher declination is classified as also part of the Orionid stream. The sporadic meteor component in the data set was examined and found to exhibit speeds much higher than expected for sporadic meteors at the time of the observations. However, these results are consistent with a selection bias based on meteoroid speed, that is inherent in radar observations. The Orionid observations indicate that the refurbishment of the radar system and the introduction of new software for meteor analysis has been successfully achieved and that radar meteor studies can now be carried out routinely with the Buckland Park 2 MHz radar. Moreover it has been shown for the first time that meteoroid speeds can be determined with a MF radar operating on a PRF as low as 60 Hz. / Thesis (Ph.D.)--School of Chemistry and Physics, 2003.
5

Medium frequency radar studies of meteors

Grant, Stephen Ian January 2003 (has links)
This thesis details the application of a medium frequency (MF) Doppler radar to observations of meteoroids entering the Earth's atmosphere. MF radars make possible a greater height coverage of the meteor region (70 to 160 km) than conventional meteor radars. However this type of radar has generally been under-utilised for meteor observations, primarily due to the less than ideal radio environment associated with MF systems. This situation demanded selection of the most appropriate radar meteor techniques and in this respect a variety of techniques are evaluated for application at this frequency. The 2 MHz radar system used in this study is located at the Buckland Park research facility (35.6 deg. S, 138.5 deg. E), near Adelaide, South Australia and is operated by the Department of Physics of the University of Adelaide. This radar has the largest antenna of any MF radar with 89 crossed dipoles distributed over an area of about 1 km in diameter. Beam forming is achieved by varying the phase to groups of elements of the array. The array was constructed in the 1960's, and while having several upgrades, a preliminary examination of the array and associated systems indicated that a significant amount of maintenance work would be required to enable the system to be used for meteor observations. It was also apparent that the software used with the radar hardware for atmospheric studies was not suitable for processing meteor data. Thus a major refurbishment of the radar hardware, as well as the development of appropriate software, was initiated. The complete radar system was divided into its constituent components of antenna array, transmitter, receiver and computer systems. The transmitter and receiver systems were examined and various improvements made including increasing total output power and enhancing beam steering capability. Time domain reflectometry (TDR) techniques were extensively used on the antenna array, as many feed cables showed the presence of moisture. New hardware in the form of a portable power combining system was designed, constructed and tested to further increase radar experimental capabilities. Techniques were developed that verified system performance was to specification. Extensive night time observations of sporadic and shower meteor events were made over a two and a half year period. A particular study was made of the Orionids shower as well as other meteor activity on the night of 22 October 2000. Using the upgraded beam swinging features of the array, a narrow radar beam was used to track the shower radiant in an orthogonal sense so as to maximise the number of shower meteors detected. From each echo, various intrinsic meteoroid parameters were determined, including meteor reflection point angle-of-arrival using a five-element interferometer, echo duration and height; meteoroid speeds were determined using the Fresnel phase time technique. Meteor echoes belonging to the Orionids radiant were selected using a coordinate transform technique. The speed was then used as an additional discriminant to confirm the Orionid shower members. A second radiant, observed at a slightly higher declination is classified as also part of the Orionid stream. The sporadic meteor component in the data set was examined and found to exhibit speeds much higher than expected for sporadic meteors at the time of the observations. However, these results are consistent with a selection bias based on meteoroid speed, that is inherent in radar observations. The Orionid observations indicate that the refurbishment of the radar system and the introduction of new software for meteor analysis has been successfully achieved and that radar meteor studies can now be carried out routinely with the Buckland Park 2 MHz radar. Moreover it has been shown for the first time that meteoroid speeds can be determined with a MF radar operating on a PRF as low as 60 Hz. / Thesis (Ph.D.)--School of Chemistry and Physics, 2003.
6

Medium frequency radar studies of meteors

Grant, Stephen Ian January 2003 (has links)
This thesis details the application of a medium frequency (MF) Doppler radar to observations of meteoroids entering the Earth's atmosphere. MF radars make possible a greater height coverage of the meteor region (70 to 160 km) than conventional meteor radars. However this type of radar has generally been under-utilised for meteor observations, primarily due to the less than ideal radio environment associated with MF systems. This situation demanded selection of the most appropriate radar meteor techniques and in this respect a variety of techniques are evaluated for application at this frequency. The 2 MHz radar system used in this study is located at the Buckland Park research facility (35.6 deg. S, 138.5 deg. E), near Adelaide, South Australia and is operated by the Department of Physics of the University of Adelaide. This radar has the largest antenna of any MF radar with 89 crossed dipoles distributed over an area of about 1 km in diameter. Beam forming is achieved by varying the phase to groups of elements of the array. The array was constructed in the 1960's, and while having several upgrades, a preliminary examination of the array and associated systems indicated that a significant amount of maintenance work would be required to enable the system to be used for meteor observations. It was also apparent that the software used with the radar hardware for atmospheric studies was not suitable for processing meteor data. Thus a major refurbishment of the radar hardware, as well as the development of appropriate software, was initiated. The complete radar system was divided into its constituent components of antenna array, transmitter, receiver and computer systems. The transmitter and receiver systems were examined and various improvements made including increasing total output power and enhancing beam steering capability. Time domain reflectometry (TDR) techniques were extensively used on the antenna array, as many feed cables showed the presence of moisture. New hardware in the form of a portable power combining system was designed, constructed and tested to further increase radar experimental capabilities. Techniques were developed that verified system performance was to specification. Extensive night time observations of sporadic and shower meteor events were made over a two and a half year period. A particular study was made of the Orionids shower as well as other meteor activity on the night of 22 October 2000. Using the upgraded beam swinging features of the array, a narrow radar beam was used to track the shower radiant in an orthogonal sense so as to maximise the number of shower meteors detected. From each echo, various intrinsic meteoroid parameters were determined, including meteor reflection point angle-of-arrival using a five-element interferometer, echo duration and height; meteoroid speeds were determined using the Fresnel phase time technique. Meteor echoes belonging to the Orionids radiant were selected using a coordinate transform technique. The speed was then used as an additional discriminant to confirm the Orionid shower members. A second radiant, observed at a slightly higher declination is classified as also part of the Orionid stream. The sporadic meteor component in the data set was examined and found to exhibit speeds much higher than expected for sporadic meteors at the time of the observations. However, these results are consistent with a selection bias based on meteoroid speed, that is inherent in radar observations. The Orionid observations indicate that the refurbishment of the radar system and the introduction of new software for meteor analysis has been successfully achieved and that radar meteor studies can now be carried out routinely with the Buckland Park 2 MHz radar. Moreover it has been shown for the first time that meteoroid speeds can be determined with a MF radar operating on a PRF as low as 60 Hz. / Thesis (Ph.D.)--School of Chemistry and Physics, 2003.
7

CMOS linear RF power amplifier with fully integrated power combining transformer / Um amplificador de potência RFCMOS linear com combinador de potência totalmente integrado

Guimarães, Gabriel Teófilo Neves January 2017 (has links)
Este trabalho apresenta o projeto de um amplificador de potência (PA) de rádio-frequência (RF) linear em tecnologia complementar metal-oxido silício (CMOS). Nele são analisados os desafios encontrados no projeto de PAs CMOS assim como soluções encontradas no estado-da-arte. Um destes desafios apresentados pela tecnologia é a baixa tensão de alimentação e passivos com alta perda, o que limita a potência de saída e a eficiência possível de ser atingida com métodos tradicionais de projeto de PA e suas redes de transformação de impedância. Este problema é solucionado através do uso de redes de combinação de impedância integradas, como a usada neste trabalho chamada transformador combinador em série (SCT). Os problemas com o uso de tecnologia CMOS se tornam ainda mais críticos para padrões de comunicação que requerem alta linearidade como os usados para redes sem-fio locais (WLAN) ou padrões de telefonia móvel 3G e 4G. Tais protocolos requerem que o PA opere em uma potência menor do que seu ponto de operação ótimo, degradando sua eficiência. Técnicas de linearização como pré-distorção digital são usadas para aumentar a potência média transmitida. Uma ténica analógica de compensação de distorção AM-PM através da linearização da capacitância de porta dos transistores é usada neste trabalho. O processo de projeto é detalhado e evidencia as relações de compromisso em cada passo, particularmente o impacto da terminação de harmônicos e a qualidade dos passivos na rede de transformação de carga. O projeto do SCT é otimizado para sintonia da impedância de modo comum que é usada para terminar o segundo harmonico de tensão do amplificador. O amplificador projetado tem um único estágio devido a área do chip ser limitada a 1:57 x 1:57 mm2, fato que impacta seu desempenho. O PA foi analisado através de simulação numérica sob várias métricas. Ele atinge uma potência máxima de saída de 24:4 dBm com uma eficiência de dreno de 24:53% e Eficiência em adição de potência (PAE) de 22%. O PA possui uma curva de ganho plana em toda faixa ISM de 2.4 GHz, com magnitude de 15:8 0:1dB. O PA tem um ponto de compressão de OP1dB = 20:03 dBm e o sinal tem um defasamento não-linear de = 1:2o até esta potência de saída. Um teste de intermodulação de dois tons com potência 3dB abaixo do OP1dB tem como resultado uma relação entre intermodulação de terceira ordem e fundamental de IMD3 = 24:22 dB, e de quinta ordem inferior e superior e fundamental de IMD5Inferior = 48:16 dB e IMD5Superior = 49:8 dB. Por fim, mostra-se que o PA satisfaz os requerimentos para operar no padrão IEEE 802.11g. Ele atinge uma potência média de saída de 15:4 dBm apresentando uma magnitude do vetor erro (EVM) de 5:43%, ou 25:3 dB e satisfazendo a máscara de saída para todos os canais. / This work presents the design of a fully integrated Radio-frequency (RF) linear Power Amplifier( PA) in complementary metal-oxide silicon (CMOS) technology. In this work we analyse the challenges in CMOS PA design as well as the state-of-the-art solutions. One such challenge presented by this technology is the low supply voltage and high-loss passives, which pose severe limits on the output power and efficiency achieved with traditional PA design methods and load impedance transformation networks. This issue is addressed by the use of on-chip, highly efficient power combining networks such as the one in this work: A series combining transformer (SCT). The problem of using CMOS becomes even more critical for recent communications standards that require high transmitter linearity such as the ones used for wireless local area network (WLAN) or 3G and 4G mobile communications. This requirement is such that the PA operate at a high power back-off from its optimum operating point, degrading efficiency. To address this problem linearization techniques such as digital pre-distortion can be used in order to decrease the necessary power back-off. In this work an analog technique of AM-PM distortion compensation is used to linearize the capacitance at the input of the amplifier’s transistors and reduce this type of distortion that severely impacts the error vector magnitude (EVM) of the signal. The design process is detailed and aims to make evident the trade-offs of PA design and particularly the impact of harmonic termination and the quality of passives on the load transformation network, the series combining transformer design is optimized for common-mode impedance tuning used for 2nd harmonic termination. The circuit has only a single amplifying stage due to its area being limited to 1:57 x 1:57 mm2 and the design is very constrained by this fact. The PA simulated performance is analyzed under various metrics. It achieves a simulated maximum output power of 24:4 dBm with a drain efficiency of 24:53% and power added efficiency (PAE) of 22%. The PA has a very flat power gain of 15:8 0:1 dB throughout the 2.4 GHz industrial, scientific and medical (ISM) band and is unconditionally stable with 4:9. The PA has a compression point of OP1dB = 20:03 dBm and the signal has a non-linear phase shift of = 1:2o up to this output power. A two-tone intermodulation test with 3dB back-off from OP1dB has a ratio of third-order intermodulation to fundamental of IMD3 = 24:22 dB, and lower and upper fifth order intermodulation to fundamental of IMD5Lower = 48:16 dB and IMD5Upper = 49:8 dB. Finally the PA is shown to satisfy the requirements for operation within the institute of electrical and electronic engineers (IEEE) 802.11g standard. It achieves an average output power of 15:4 dBm while having an EVM of 5:43% or 25:3 dB while satisfying the output spectrum mask for all channels.
8

CMOS linear RF power amplifier with fully integrated power combining transformer / Um amplificador de potência RFCMOS linear com combinador de potência totalmente integrado

Guimarães, Gabriel Teófilo Neves January 2017 (has links)
Este trabalho apresenta o projeto de um amplificador de potência (PA) de rádio-frequência (RF) linear em tecnologia complementar metal-oxido silício (CMOS). Nele são analisados os desafios encontrados no projeto de PAs CMOS assim como soluções encontradas no estado-da-arte. Um destes desafios apresentados pela tecnologia é a baixa tensão de alimentação e passivos com alta perda, o que limita a potência de saída e a eficiência possível de ser atingida com métodos tradicionais de projeto de PA e suas redes de transformação de impedância. Este problema é solucionado através do uso de redes de combinação de impedância integradas, como a usada neste trabalho chamada transformador combinador em série (SCT). Os problemas com o uso de tecnologia CMOS se tornam ainda mais críticos para padrões de comunicação que requerem alta linearidade como os usados para redes sem-fio locais (WLAN) ou padrões de telefonia móvel 3G e 4G. Tais protocolos requerem que o PA opere em uma potência menor do que seu ponto de operação ótimo, degradando sua eficiência. Técnicas de linearização como pré-distorção digital são usadas para aumentar a potência média transmitida. Uma ténica analógica de compensação de distorção AM-PM através da linearização da capacitância de porta dos transistores é usada neste trabalho. O processo de projeto é detalhado e evidencia as relações de compromisso em cada passo, particularmente o impacto da terminação de harmônicos e a qualidade dos passivos na rede de transformação de carga. O projeto do SCT é otimizado para sintonia da impedância de modo comum que é usada para terminar o segundo harmonico de tensão do amplificador. O amplificador projetado tem um único estágio devido a área do chip ser limitada a 1:57 x 1:57 mm2, fato que impacta seu desempenho. O PA foi analisado através de simulação numérica sob várias métricas. Ele atinge uma potência máxima de saída de 24:4 dBm com uma eficiência de dreno de 24:53% e Eficiência em adição de potência (PAE) de 22%. O PA possui uma curva de ganho plana em toda faixa ISM de 2.4 GHz, com magnitude de 15:8 0:1dB. O PA tem um ponto de compressão de OP1dB = 20:03 dBm e o sinal tem um defasamento não-linear de = 1:2o até esta potência de saída. Um teste de intermodulação de dois tons com potência 3dB abaixo do OP1dB tem como resultado uma relação entre intermodulação de terceira ordem e fundamental de IMD3 = 24:22 dB, e de quinta ordem inferior e superior e fundamental de IMD5Inferior = 48:16 dB e IMD5Superior = 49:8 dB. Por fim, mostra-se que o PA satisfaz os requerimentos para operar no padrão IEEE 802.11g. Ele atinge uma potência média de saída de 15:4 dBm apresentando uma magnitude do vetor erro (EVM) de 5:43%, ou 25:3 dB e satisfazendo a máscara de saída para todos os canais. / This work presents the design of a fully integrated Radio-frequency (RF) linear Power Amplifier( PA) in complementary metal-oxide silicon (CMOS) technology. In this work we analyse the challenges in CMOS PA design as well as the state-of-the-art solutions. One such challenge presented by this technology is the low supply voltage and high-loss passives, which pose severe limits on the output power and efficiency achieved with traditional PA design methods and load impedance transformation networks. This issue is addressed by the use of on-chip, highly efficient power combining networks such as the one in this work: A series combining transformer (SCT). The problem of using CMOS becomes even more critical for recent communications standards that require high transmitter linearity such as the ones used for wireless local area network (WLAN) or 3G and 4G mobile communications. This requirement is such that the PA operate at a high power back-off from its optimum operating point, degrading efficiency. To address this problem linearization techniques such as digital pre-distortion can be used in order to decrease the necessary power back-off. In this work an analog technique of AM-PM distortion compensation is used to linearize the capacitance at the input of the amplifier’s transistors and reduce this type of distortion that severely impacts the error vector magnitude (EVM) of the signal. The design process is detailed and aims to make evident the trade-offs of PA design and particularly the impact of harmonic termination and the quality of passives on the load transformation network, the series combining transformer design is optimized for common-mode impedance tuning used for 2nd harmonic termination. The circuit has only a single amplifying stage due to its area being limited to 1:57 x 1:57 mm2 and the design is very constrained by this fact. The PA simulated performance is analyzed under various metrics. It achieves a simulated maximum output power of 24:4 dBm with a drain efficiency of 24:53% and power added efficiency (PAE) of 22%. The PA has a very flat power gain of 15:8 0:1 dB throughout the 2.4 GHz industrial, scientific and medical (ISM) band and is unconditionally stable with 4:9. The PA has a compression point of OP1dB = 20:03 dBm and the signal has a non-linear phase shift of = 1:2o up to this output power. A two-tone intermodulation test with 3dB back-off from OP1dB has a ratio of third-order intermodulation to fundamental of IMD3 = 24:22 dB, and lower and upper fifth order intermodulation to fundamental of IMD5Lower = 48:16 dB and IMD5Upper = 49:8 dB. Finally the PA is shown to satisfy the requirements for operation within the institute of electrical and electronic engineers (IEEE) 802.11g standard. It achieves an average output power of 15:4 dBm while having an EVM of 5:43% or 25:3 dB while satisfying the output spectrum mask for all channels.
9

Design of a Gysel Combiner at 100 MHz

Abdul Nazar, Mohamed January 2019 (has links)
This thesis relates to the design and implementation of a Gysel power combiner consisting of two input ports. The design is implemented using discrete (lumped) components over the conventional transmission line architecture and operates at 100 MHz. Because of the high power requirements for the power combiner, special attention is given to the power handling capabilities of the lumped elements and the other components involved. Simulations of an S-parameter of Gysel power combiner are performed using the Advanced Design System (ADS) from Keysight Technologies. The final design of two-way Gysel power combiner using PCB toroidal inductor was implemented, simulated and optimized at centre frequency of 100 MHz. Satisfactory results were obtained in terms of Insertion loss, Return loss and Port Isolation.
10

Combinaison de puissance hyperfréquence à faibles pertes et compacte / Low loss and compact high power combination

Bonnet, Sebastien 16 December 2014 (has links)
Ces travaux de thèse concernent le développement de combineur de puissance faibles pertes et compact selon une architecture planaire pour des applications amplificateur de forte puissance à état solide en bande X. La conception du combineur de puissance s’appuie sur l’étude de structures multicouches faibles pertes et compactes en triplaque à air suspendu. Une étude électromagnétique et thermique est proposée pour déterminer les performances de ces structures de transmission dans la bande X. Un système de refroidissement est également mis en place pour permettre aux structures de transmission de tenir des puissances moyenne de l’ordre de 50 W. La réalisation et la caractérisation de ces structures triplaques à air ont permis de démontrer les caractéristiques de faibles pertes et de compacité de ces circuits imprimés. Cette technologie triplaque à air suspendue est alors compatible pour des applications de forte puissance comme les émetteurs à état solide. / This PhD thesis deals with planar architecture design development of low loss and compact power combiner for solid-state high power amplification in X-band. The design is based on the study of innovative multilayer air dielectric stripline transmission structures. A reliable printed circuit process allows to obtain low loss, compact and replicable stripline structures. Electromagnetic FEM and thermal studies are proposed to evaluate transmission structures performances in X-band. Two compact and scalable structures were developed and may be integrated into complex multilayer systems. Finally a cooling system with periodic ceramic contacts is developed to improve the power handling capability of these stripline structures up to 50 W. The study, development and benchmark of these stripline structures demonstrated their compactness and low loss behaviour. Ultimately, these attributes make them excellent candidates for high power solid-state emitters.

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