This research details the development of a novel process for four commercially available no-flow fluxing underfills for use with flip chip on FR4 substrates. The daisy chain test die was used such that two point resistance measurements could be used to determine the integrity of the solder interconnects post reflow. The impact of the underfill dispensing pattern on underfill void formation is determined in a full factorial dispense DOE that includes two factors: pattern and speed. Evaluation metrics include underfill material voiding and fillet shape. The impact of the placement process is determined in a second full factorial DOE involving three factors at two levels each: dispense pattern, placement force, and dwell time. Metrics include interconnect yield and underfill voiding. The results of these DOEs are used to select an optimal placement process for each material to be used for the remaining reflow experiments. The process developed is a novel approach to no-flow processing; the material is dispensed to the side of the bond site and allowed to flow under the chip after placement by capillary action during the early stages of reflow. This development allows for void free assemblies using no-flow materials. Reflow parameters are investigated using a parametric approach. The following parameters are varied at 2 levels individually off a baseline profile: Peak Temperature, Time > 183 oC, Peak Ramp Rate, Soak Time, and Soak Temperature. A ranking was developed for each material based on the observable metrics: interconnect yield, underfill material voiding, two point resistance, and a grain area fraction term. The results were used to select an optimal assembly process for each material. Test boards were assembled in replicates of 30 according to the optimal process for each material, and AATC -40 to 125 oC thermal cycling test was performed. The MTTF for these assemblies has exceeded 3000 cycles; the void free process successfully avoids premature failure due to solder extrusion into voids. Further process development work has demonstrated that the process is scalable to larger area array die and other edge dispense patterns have also been demonstrated to result in void free assemblies.

No

O presente trabalho faz inicialmente uma revisão básica a respeito de diodos controlados por porta ressaltando o método criado por Grove, e corrigido por Pierret, para a determinação da velocidade de recombinação superficial, parâmetro esse, importante na análise do desempenho do dispositivo frente a situações que tendem a degradar o funcionamento do mesmo. Em seguida, propomos a utilização de DCP\'s como sensores de radiação luminosa e possivelmente como sensor de cores. Para tanto, simulamos o comportamento de uma junção PN sob iluminação quando variamos a extensão da região de depleção associada à mesma. De acordo com essas simulações, observamos que o rendimento de conversão da energia luminosa para elétrica, em função do comprimento de onda da luz incidente, apresenta dependência com relação a extensão da região de carga espacial. Essa característica pode vir a ser usada, futuramente, na detecção seletiva de comprimentos de onda, e portanto, permitindo a discriminação de cores. A variação da largura da região de depleção nas proximidades de uma junção PN pode ser conseguida, numa estrutura do tipo DCP, através da aplicação em sua porta, de pulsos de amplitude e inclinação adequadas, de forma a levá-lo a operar em depleção profunda. Nessas condições, o valor máximo da largura da região de depleção é maior do que o seu valor máximo estacionário, podendo chegar a até 3 vezes o mesmo, conforme foi constatado por simulação, através de um software por nós desenvolvido, para uma estrutura MOS pulsada. Tal simulação forneceu-nos o campo e potencial elétricos e a concentração de portadores em função da profundidade através da resolução da equação de Poisson com condições de contorno adequadas. Dados os resultados obtidos nas simulações, a próxima etapa foi a elaboração de máscaras litográficas para construir diodos controlados por porta com diferentes geometrias, algumas sugeridas pela literatura, outras ) desenvolvidas para esse trabalho. Tais máscaras foram confeccionadas pelo CTI em Campinas e foram desenhadas através do software Microeletrônica de Etienne Sicard da universidade de Toulouse. Utilizamos as máscaras fabricadas para construir uma pastilha-teste preliminar com os diodos controlados por porta propostos. Infelizmente, nesta única corrida, tivemos curto-circuito entre porta e substrato e apenas as junções PN funcionaram a contento. Obtivemos diodos com fator de idealidade de ~1,4 e densidade de corrente reversa, no melhor dos casos, igual a 1,23.104 nA/cm² para áreas de (1000 x 1000) µm². Por outro lado, como não conseguimos DCP\'s funcionando, utilizamos transistores nMOS convencionais, fornecidos pelo Prof. João Antonio Martino, para medir a velocidade de recombinação superficial, \"velocidade de recombinação aparente\", que resultou em 5,5×106 cm/s, segundo o método proposto por Pierret. / This work presents a basic review about gate-controlled diodes (GCD) mainly on the method created by Grove and corrected by Pierret, for measuring the surface recombination velocity that is an important parameter on the analysis of device performance. In the sequence, we propose the use of GCD\'s as light radiation sensors and, probably as color sensors. To do so, we have simulated the behavior of a PN junction under illumination, varying the depletion region length. The simulations revealed that the luminous to electrical energy conversion depends on the length of the spatial charge region. This could be used, in the future, on the selective wavelength detection, alloying color discrimination. The variation of the depletion region length in the vicinity of a PN junction can be done, in a GCD structure, by applying in its gate, a set of electrical pulses with the right characteristics, in order to drive it to the deep depletion mode. In these conditions, the maximum length of the depletion region is larger than its steady state value, reaching as much as 3 times that value, as could be determined by means of simulation of a pulsed MOS structure, in a specific software developed for that purpose. This software give us the electric field and potencial and the carrier concentration against depth into the silicon by solving the Poisson equation with the right boundary conditions. Keeping these results in mind, the next step was the project of the lithographic masks in order to explore some different geometries, some of them suggested by the literature, others developed in this work. The fabrication of those masks were done by CTI in Campinas e were designed with the software Microeletrônica by Etienne Sicard from the university of Toulouse. We have used the masks to manufacture a preliminary chip test which included gate-controled diodes.Unfortunately, in this unique run, \"short circuits\" between gate and bulk has occurred and only the PN junctions worked as expected. We have obtained diodes with ideality factor of ~1.4 and reverse current density of 1.23.104 nA/cm² in the best case for junction areas of (1000 x 1000) µm². On the other hand, as we have not got gate-controlled diodes which were working, we have used conventional nMOS transistors borrowed by Prof. João Antônio Martino. Surface recombination velocity so was measured in these nMOS transistors and resulted in 5.5.106 cm/s, according to the method proposed by Pierret.

O presente trabalho faz inicialmente uma revisão básica a respeito de diodos controlados por porta ressaltando o método criado por Grove, e corrigido por Pierret, para a determinação da velocidade de recombinação superficial, parâmetro esse, importante na análise do desempenho do dispositivo frente a situações que tendem a degradar o funcionamento do mesmo. Em seguida, propomos a utilização de DCP\'s como sensores de radiação luminosa e possivelmente como sensor de cores. Para tanto, simulamos o comportamento de uma junção PN sob iluminação quando variamos a extensão da região de depleção associada à mesma. De acordo com essas simulações, observamos que o rendimento de conversão da energia luminosa para elétrica, em função do comprimento de onda da luz incidente, apresenta dependência com relação a extensão da região de carga espacial. Essa característica pode vir a ser usada, futuramente, na detecção seletiva de comprimentos de onda, e portanto, permitindo a discriminação de cores. A variação da largura da região de depleção nas proximidades de uma junção PN pode ser conseguida, numa estrutura do tipo DCP, através da aplicação em sua porta, de pulsos de amplitude e inclinação adequadas, de forma a levá-lo a operar em depleção profunda. Nessas condições, o valor máximo da largura da região de depleção é maior do que o seu valor máximo estacionário, podendo chegar a até 3 vezes o mesmo, conforme foi constatado por simulação, através de um software por nós desenvolvido, para uma estrutura MOS pulsada. Tal simulação forneceu-nos o campo e potencial elétricos e a concentração de portadores em função da profundidade através da resolução da equação de Poisson com condições de contorno adequadas. Dados os resultados obtidos nas simulações, a próxima etapa foi a elaboração de máscaras litográficas para construir diodos controlados por porta com diferentes geometrias, algumas sugeridas pela literatura, outras ) desenvolvidas para esse trabalho. Tais máscaras foram confeccionadas pelo CTI em Campinas e foram desenhadas através do software Microeletrônica de Etienne Sicard da universidade de Toulouse. Utilizamos as máscaras fabricadas para construir uma pastilha-teste preliminar com os diodos controlados por porta propostos. Infelizmente, nesta única corrida, tivemos curto-circuito entre porta e substrato e apenas as junções PN funcionaram a contento. Obtivemos diodos com fator de idealidade de ~1,4 e densidade de corrente reversa, no melhor dos casos, igual a 1,23.104 nA/cm² para áreas de (1000 x 1000) µm². Por outro lado, como não conseguimos DCP\'s funcionando, utilizamos transistores nMOS convencionais, fornecidos pelo Prof. João Antonio Martino, para medir a velocidade de recombinação superficial, \"velocidade de recombinação aparente\", que resultou em 5,5×106 cm/s, segundo o método proposto por Pierret. / This work presents a basic review about gate-controlled diodes (GCD) mainly on the method created by Grove and corrected by Pierret, for measuring the surface recombination velocity that is an important parameter on the analysis of device performance. In the sequence, we propose the use of GCD\'s as light radiation sensors and, probably as color sensors. To do so, we have simulated the behavior of a PN junction under illumination, varying the depletion region length. The simulations revealed that the luminous to electrical energy conversion depends on the length of the spatial charge region. This could be used, in the future, on the selective wavelength detection, alloying color discrimination. The variation of the depletion region length in the vicinity of a PN junction can be done, in a GCD structure, by applying in its gate, a set of electrical pulses with the right characteristics, in order to drive it to the deep depletion mode. In these conditions, the maximum length of the depletion region is larger than its steady state value, reaching as much as 3 times that value, as could be determined by means of simulation of a pulsed MOS structure, in a specific software developed for that purpose. This software give us the electric field and potencial and the carrier concentration against depth into the silicon by solving the Poisson equation with the right boundary conditions. Keeping these results in mind, the next step was the project of the lithographic masks in order to explore some different geometries, some of them suggested by the literature, others developed in this work. The fabrication of those masks were done by CTI in Campinas e were designed with the software Microeletrônica by Etienne Sicard from the university of Toulouse. We have used the masks to manufacture a preliminary chip test which included gate-controled diodes.Unfortunately, in this unique run, \"short circuits\" between gate and bulk has occurred and only the PN junctions worked as expected. We have obtained diodes with ideality factor of ~1.4 and reverse current density of 1.23.104 nA/cm² in the best case for junction areas of (1000 x 1000) µm². On the other hand, as we have not got gate-controlled diodes which were working, we have used conventional nMOS transistors borrowed by Prof. João Antônio Martino. Surface recombination velocity so was measured in these nMOS transistors and resulted in 5.5.106 cm/s, according to the method proposed by Pierret.

Main goal of this thesis is evaluation of the available SON and sacrificial layer technologies from the perspective of temperature sensor design. Based on the findings, a series of detector architectures is proposed. The work is subdivided into two major parts, with the first one targeting the process characterization. Good command of the selected technology, awareness of its dependencies and limitations, is essential and has to be examined prior to any MEMS design. Pressure related topics are of particular interest, since this criterion, among others, highly influences the performance of thermal systems. Knowledge of the critical parameters is applied in the second half, where the actual IR sensor design is considered. Process characterization, required for thermal insulation estimations, is not the only link between the two physics fields. Discussed IR detectors are highly inspired by the developed pressure sensing solutions. This resulted in either similar operation principles being applied, or even the same fabricated structures being adapted for new use.:List of abbreviations List of Figures List of Tables Acknowledgements 1 Introduction 1.1 Motivation and organization of the work 1.2 Microstructure fabrication methods 1.2.1 Surface micromachining 1.2.2 Bulk micromachining 1.2.3 SOI and SON structuring 2 Pressure sensor for process characterization applications 2.1 Motivation 2.2 Pirani gauge approach 2.2.1 Principles of operation and state of the art 2.2.2 Modelling 2.2.2.1 Setup 2.2.2.2 Results 2.2.3 Processing 2.2.4 Measurement 2.2.4.1 Setup 2.2.4.2 Results 2.2.5 Application 2.2.5.1 Outgassing characterization 2.2.5.2 Reliability investigation 2.2.5.3 Thermal emitter for IR spectroscopy 2.2.5.4 Active pressure sensor 2.3 Capacitive sensor approach 2.3.1 Principles of operation and state of the art 2.3.2 Surface channel approach 2.3.3 SON channel approach 2.3.4 Application 2.3.4.1 MEMS dynamic characterization 2.3.4.2 Differential capacitive pressure sensor 2.4 Summary and overview of results 3 Temperature sensor for IR applications 3.1 Motivation 3.2 Resistive sensor approach 3.2.1 Principles of operation 3.2.2 Modelling 3.2.3 Measurement 3.3 Capacitive sensor approach 3.3.1 Principles of operation 3.3.2 Modelling 3.3.2.1 Setup 3.3.2.2 Results 3.3.3 Processing 3.4 Junction - based approach 3.4.1 State of the art 3.4.2 Thermal insulation design 3.4.2.1 Overview 3.4.2.2 Processing 3.4.2.3 Thermal performance 3.4.3 Detector design 3.4.3.1 Diode sensing solution 3.4.3.2 Bipolar Junction Transistor sensing solution 3.4.3.3 Junction Field Effect Transistor sensing solution 3.5 Summary and overview of results 4 Conclusion Bibliography

The aim of this study is to investigate and compare the properties of two layer carbon epoxy composite plates manufactured using various resin impregnation techniques / Resin Transfer Molding (RTM), Light RTM (LRTM), Vacuum Assisted RTM (VARTM) and Vacuum Packaging (VP). Throughout the study a different packaging method was developed and named Modified Vacuum Packaging (BP). The mechanical properties of composite plates manufactured are examined by tensile tests, compressive tests, in-plane shear tests and their thermal properties are examined by Differential Scanning Calorimetry (DSC) and Thermo Gravimetric Analysis (TGA) tests. All tests were performed according to suitable ASTM standards. The performance of specimens from each process was observed to vary according to the investigated property / however the VP process showed the highest performance for most properties. For most of the tests, VARTM, LRTM and RTM methods were following VP process in terms of performance, having close results with each other.

El presente documento propone un modelo de Gestión de la Calidad que se basa en la caracterización de procesos y en las buenas prácticas agrícolas establecidas por Ecuador, que contará con cuatro subprocesos que serán los encargados de la estandarización y cubrirán todos los aspectos necesarios para lograr una mayor productividad en las MYPES plataneras de Mala: planificación de la calidad, control de calidad, auditoría de calidad y capacitación de calidad. / This document proposes a Quality Management model based on the characterization of processes and good agricultural practices established by Ecuador, which will have four subprocesses that will be responsible for standardization and will cover all aspects necessary to increase the productivity of the banana plantations of Mala: quality planning, quality control, internal quality audit and quality training. / Tesis