The aim of this thesis is to create a port of the Zephyr realtime operating systemfor the LEON processor platform. The LEON is a frequently used computing corefor spaceflight applications, with ample flight heritage. It is based upon the wellestablished SPARC v8 instruction set, and offers many extensions to ease softwaredevelopment and increase overall processor performance. An overview of the nec-essary steps towards a functional architecture port is given in this report. Specialemphasis is put upon the interrupt handling and context switching. One LEONspecific feature introduced with the GR716 LEON3-FT microcontroller, registerwindow partitioning, is used to increase the performance of the context switchingmechanism in the operating system. By using this feature, context switching timehas shown to decrease significantly, while easing verification of the overall softwaresystem by providing dedicated partitions for tasks with hard realtime requirements. / Det övergripande målet med examensarbetet är att porta Zephyr realtidsopera-tivsystem (OS) till LEON processorplattformen. LEON processorn är ursprungligendesignad för och förekommer ofta i datorsystem inom rymd p.g.a. sina feltolerantaegenskaper. LEON är kompatibel med den öppna SPARC v8 instruktionsuppsät-tningen vilken också tillåter utökning och anpassningar. Rapporten ger läsaren enöverblick av vilka steg som är nödvändiga för att skapa en fungerande arkitektur-port av ett OS. Vidare beskriver rapporten mer i detalj designen kring trådväxlingoch avbrottshantering, samt hur dessa anpassas för att utnyttja LEON specifikautökningar av SPARC till att nå högre prestanda. GR716 LEON3-FT introducerarpartitionering av SPARC registerfönster för att kunna minska tiden det tar opera-tivsystemet att växla trådar. Denna funktion har inte använts tidigare i något OS,och är därför av särskilt intresse att studera och karakterisera. Resultaten visar atttrådväxlingstiden minskat signifikant, samtidigt som determinismen blivit bättreoch därigenom är det nu enklare att designa system med hårda realtidskrav.

<p>Integrated systems become larger and more complicated every day while time to market is shortened. Due to this, there is a need for flexible hardware platforms that use programmable logic not only for custom hardware but also for realizing embedded processors.</p><p>This thesis aims to select a suitable, FPGA targeted, soft processor core and adapt the real-time operating system OSE_ck to run on the selected target. A study of possibilities to integrate setup and configuration of OSE_ck into the processor’s IDE is also performed.</p><p>Studies of OSE_ck and the two processor candidates MicroBlaze and Nios II have been performed. The processor study showed that MicroBlaze and Nios II have a very similar architecture and both are suitable to host OSE_ck. MicroBlaze was chosen as target processor mainly because of more available documentation regarding operating system integration.</p><p>Performance and footprint was measured with OSE_ck on MicroBlaze. The performance figures indicate that MicroBlaze can not be expected to have the same processing power as hard processors but works well as a control processor. To achieve high application performance, custom hardware accelerators can be connected. Integration investigations and tests have been performed with the goal of making an interface that conforms to the normal MicroBlaze design flow.</p><p>OSE_ck has been successfully adapted to run on MicroBlaze and integration in the development environment is possible although some steps have to be done manually. Alternative integration options are discussed.</p>

In real time embedded systems, more and more developers are choosing the soft processor option to save money, power and area on their boards. Reconfigurability concept of the soft processor gives more options to the designer, also solving the problem of processor obsolescence. Another increasing trend is using real time operating systems (RTOSs) for microprocessors or microcontrollers. RTOSs help software developers to meet the critical deadlines of the real time environment with their deterministic and predictable behaviour. Providing service APIs and fast response times for task management, memory and interrupts / RTOSs decrease the development time of on going, and also future, projects of software developers. Comparing RTOSs on RTOS-specific benchmark criteria, called RTOS benchmarking in the literature, helps software developers to choose the appropriate RTOS for their requirements and provokes RTOS companies to strengthen their products on areas where they are weak. This study will compare three popular RTOSs on Xilinx&rsquo / s soft processor platform MicroBlaze. Xilkernel, &micro / C/OS-II and FreeRTOS are selected among nine available RTOSs for MicroBlaze and are compared against critical RTOS benchmarking criteria, which are task preemption time, task preemption time under load, get/release semaphore time, pass/receive message time, get/release fixed sized dynamic memory time, UART RS-422 message interrupt serving time, RTOS initialization time and memory footprint data. Results are interpreted using architectural concepts of the RTOSs considered.

Integrated systems become larger and more complicated every day while time to market is shortened. Due to this, there is a need for flexible hardware platforms that use programmable logic not only for custom hardware but also for realizing embedded processors. This thesis aims to select a suitable, FPGA targeted, soft processor core and adapt the real-time operating system OSEck to run on the selected target. A study of possibilities to integrate setup and configuration of OSEck into the processor’s IDE is also performed. Studies of OSEck and the two processor candidates MicroBlaze and Nios II have been performed. The processor study showed that MicroBlaze and Nios II have a very similar architecture and both are suitable to host OSEck. MicroBlaze was chosen as target processor mainly because of more available documentation regarding operating system integration. Performance and footprint was measured with OSEck on MicroBlaze. The performance figures indicate that MicroBlaze can not be expected to have the same processing power as hard processors but works well as a control processor. To achieve high application performance, custom hardware accelerators can be connected. Integration investigations and tests have been performed with the goal of making an interface that conforms to the normal MicroBlaze design flow. OSEck has been successfully adapted to run on MicroBlaze and integration in the development environment is possible although some steps have to be done manually. Alternative integration options are discussed.

This thesis is part of the European MANY project. The goal of MANY is to provide developers with tools to develop software for multi and many-core hardware platforms. This is the first thesis that is part of MANY at Enea. The thesis aims to provide a knowledge base about software on many-core at the Enea student research group. More than just providing a knowledge base, a part of the thesis is also to port Enea's operating system OSE to Tilera's many-core processor TILEpro64. The thesis shall also investigate the memory hierarchy and interconnection network of the Tilera processor. The knowledge base about software on many-core was constrained to investigating the shared memory model and operating systems for many-core. This was achieved by investigating prominent academic research about operating systems for many-core processors. The conclusion was that a shared memory model does not scale and for the operating system case, operating systems shall be designed with scalability as one of the most important requirements. This thesis has implemented the hardware abstraction layer required to execute a single-core version of OSE on the TILEpro architecture. This was done in three steps. The Tilera hardware and the OSE software platform were investigated. After that, an OSE target port was chosen as reference architecture. Finally, the hardware dependent parts of the reference software were modified. A foundation has been made for future development.

For a long time, the development of component-based systems has been a crucial part of real-time software development required for embedded and automotive domains. However, most of the existing tools used in these fields are not only proprietary, but also expensive and not research-friendly. Open-source tools in this domain are so far quite limited in terms of the features supported, especially, code generation. In this thesis, we demonstrate how we can improve the development of real-time and concurrent systems by the introduction of component-based modelling into Umple, an open-source modelling tool. Our work enables component-based modelling to be performed both textually and visually, as is the case with other Umple features. We introduce a number of major features into Umple. First, we introduce support for real-time C++ code generation. This includes supporting all Umple features, such as class diagrams, associations, state machines, and attributes. In order to achieve this, we also introduce Umple Template Language (Umple-TL), which helps Umple developers to use Umple itself to emit text using easy-to-use constructs, such that the text emitted can be in different target languages such Java and C++. Umple-TL provides additional capabilities relying on Umple being a model-oriented and object-oriented language. Umple-TL has become the technology for all code generation in Umple, not just our real-time C++ generators. Umple-TL also plays a vital role easing writing component descriptions Second, we support concurrency, which is crucial for the underlying architecture of composite structure. We have to avoid relying on any third-party libraries in order to make sure that the code generated will be deployable on embedded devices, which are limited and do not provide a lot of options. The concurrency pattern we follow extends the active object pattern aiming to enhance communication among active objects. Concurrency development in general, even if a programming language used is not real-time, is not easy. Hence, we simplify active object concepts, such as future, promise, and delay, using new Umple keywords. We also add composite structure support to Umple, we believe that our syntax and language constructs are comprehensive, and do not require a wide knowledge of modelling and UML concepts. Additionally, we introduce a novel protocol-free approach that dynamically extracts communication protocols from ports, bindings, and active objects as a way to simplify development, and to lead to concise and optimized code generation. We demonstrate the effectiveness of our work using cases studies, in which we implement Umple models using our new composite structure and concurrency constructs. We show that the amount of code required to specify complex concepts is reduced, and the generated systems are effective.

This semestral work deals with the design and realization of multipurpose milling machine for production of prototype small components made from soft materials and PCBs. Thesis contains design of mechanical construction, individual parts of driving machine and graphic user interface.

This thesis focuses on energy efficiency of particular aspects of data processing on wireless sensor nodes and deals with methods aiming to decrease energy consumption of wireless sensor network (WSN) applications requiring high processing power. The work presents comprehensive analysis of mesh protocols and available hardware platforms in terms of energy efficiency. A new energy efficient sensor node with high processing capability is presented and utilized to evaluate the proposed system for autonomous data transmission in WSN. Finally, an implementation of real-time operation system supporting mesh communication and very strict energy requirements through energy profiles is also presented. A valuable finding is that further increase of energy efficiency is only possible through a holistic approach in software and hardware architecture design, so that hardware and software/ firmware are tightly coupled. The output of this research might be applied in industry or academy field without necessity of any change or prior knowledge of WSN. The autonomous system of data transmission opens new research possibilities to decrease energy requirements of WNS.

Asymmetric multiprocessing (AMP) is a way of distributing computer system load toheterogeneous hardware and software environment. This thesis describes the principles of the AMP focusing on the ARM Cortex--A9 processor and Altera Cyclone V hardware platform. Development of a OpenAMP framework based AMP system showing communication among the processor cores, documentation and future work suggestion are the products of this thesis.

Work done at Luleå Technical University regarding the RTIC RTOS framework is expanded upon to yield a convenient toolset for event-based instrumentation by exploiting debug peripherals available on the ARMv7-M platform. By parsing the source of an RTIC application and recovering instrumentation metadata from user-supplied information, the target-emitted trace stream is decoded and mapped to RTIC task events, yielding a timeline of events that can be analyzed live and postmortem by help of a recording host-side daemon. Relevant sections of the ARMv7-M standard are covered, and peripheral configuration covered in detail. An instrumentation result of a trivial RTIC application is presented and graphically plotted to exemplify the value of the toolset, and topics of future work to improve the toolset are outlined.