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Real-time systems are those whose correctness depends not only on logical results of computations, but also on the time at which the results are produced. This thesis provides a formal definition for real-time systems and includes the following original contributions on real-time scheduling algorithms. The first topic studied in the thesis is minimizing the total penalty to be paid in scheduling a set of soft real-time tasks. The problem is NP-hard. We prove the properties of any optimal scheduling algorithm. We also derive a number of heuristic algorithms which satisfy the properties obtained. Moreover, we obtain a tight upper bound for the optimal solution to the problem. Numerical results that compare the upper bound with the optimal solution and the heuristic algorithms are provided. In the second part of this thesis, we study the problem of minimizing the number of processors required for scheduling a set of periodic preemptive independent hard real-time tasks. We use a partitioning strategy with an EDF scheduling algorithm on each processor. The problem is NP-hard. We derive lower and upper bounds for the number of processors required to satisfy the constraints of the problem. We also compare a number of heuristic algorithms with each other and with the bounds derived in this research. Numerical results demonstrate that our lower bound is very tight. In the third part of the thesis, we study the problem of uplink scheduling in telecommunication systems with two dimensional resources. Our goal is to maximize the total value of the packets sent in uplink subframe such that system constraints and requirements are satisfied. The packets have various QoS requirements and have either soft or hard deadlines. We take two approaches, namely 0-1 and fractional approaches, to model the problem. Considering the properties of the application, we derive globally optimal solutions in polynomial time for the models. We also present a method to fine-tune the models. Numerical results are provided to compare the performance of the various optimal algorithms each corresponding to a model. / Thesis (Ph.D, Computing) -- Queen's University, 2009-04-24 08:22:04.238

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Execution time control is a technique that allows execution time budgets to be set and overruns to be handled dynamically to prevent deadline misses. This removes the need for the worst-case execution time (WCET) of tasks to be found by offline timing analysis – a problem that can be very hard to solve for modern computer architectures. Execution time control can also increase the processor utilization, as the WCET will often be much higher than the average execution time. This thesis describes how the GNU Ada Compiler and a bare-board Ravenscar run-time environment were ported to the Atmel AVR32 UC3 microcontroller series making the Ada programming language available on this architecture for the first time, and an implementation of Ada execution time control for this system that supports full execution time control for interrupt handling. Usage patterns for this brand new feature are demonstrated in Ada by extending the object-oriented real-time framework with execution time servers for interrupt handling, allowing the system to be protected against unexpected bursts of interrupts that could otherwise result in deadline misses. Separate execution time measurement for interrupt handling also improves the accuracy of measurement for tasks. As a direct result of the work presented in this thesis separate execution time measurement for interrupts will be included in the forthcoming ISO-standard for Ada 2012. While the implementation of execution time control is for the Ada programming language and the UC3 microcontroller series, the design and implementation should be portable to other architectures, and the principles of execution time control for interrupt handling applicable to other programming languages. Low run-time overhead is important for execution time control to be useful for real-time systems. Therefore a hardware Time Management Unit (TMU) was designed to reduce the overhead of execution time control. This design has been implemented for the UC3 and performance tests with the developed run-time environment shows that it gives a significant reduction of overhead. The memory-mapped design of the TMU also allows it to be implemented on other architectures.

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Due to advances in capacity, speed, and economics, NAND-based flash memory technology is increasingly integrated into all types of computing systems, ranging from enterprise servers to embedded devices. However, due to its unpredictable up-date behavior and time consuming garbage collection mechanism, NAND-based flash memory is difficult to integrate into hard-real-time embedded systems. In this thesis, I propose a performance model for flash memory garbage collection that can be used in conjunction with a number of different garbage collection strategies. I describe how to model the cost of reactive (lazy) garbage collection and compare it to that of more proactive schemes. I develop formulas to assess the schedulability of hard real- time periodic task sets under simplified memory consumption models. Results show that I prove the proactive schemes achieve the larger maximum schedulable utilization than the traditional garbage collection mechanism for hard real-time systems in flash memory.