<p>This master thesis describes a radio reciever with simple architecture which operates at 20 MHz. This is based on low-cost amplifier design. Super-Regenerative Receiver (SRR)is re-examined for its simplicity, low-power and short-range wireless applications. Power consumption is kept to a minimal level without any change in the performance of reciever by providing minimum biasing to discrete devices. This report shows how with the help of modern computer based investigation and simulation tools, a much more wide-ranging characterization of the behavior of the reciever is possible.</p><p>The Simulation software used to implement this model i advanced Designed System, ADS2006A. This designed model consist of two stages,the linear pre-amplifier stage and the super-regenerative oscillator (non-linear stage). The linear stage has a 1th-order low band-pass filter which connects the input terminal end with the pre-amplifier, while the non-linear stage is consist of class with LC resonant tank, and the self-quenching circuit.</p><p>The fundamental quench frequency of this reciever is 8 kHz. In the simulation, the supplied voltage, VDD, is 5,0 volts is used which produced input current of 5,06 mA. The results show that the designed model presents its best performance at the 20 MHz radio frequency (RF).</p>

<p>This master thesis describes a radio receiver with architecture which operates at 20 MHz.This is based on low-amplifier design. Super-Regenerative Receiver (SRR) is re-examined for its simplicity, low-power, and short-range wireless applications. Power consumption is kept toa minimal level any change in the performance of receiver by providing minimum biasing to discrete devices. This report shows how with the help of modern computer based investigation and simulation tools, a much more wide-ranging characterization of the behavior of the reciever is possible.</p><p>The simulation software used to implement this model is advanced Designed System, ADS2006A. This designed medel consists of two stages, the linear pre-amplifier stage and the super-regenerative oscillator (non-linear-stage). The linear stage has a 1st-order low band-pass filter which connects the input terminal end with the pre-amplifier, while the non-linear stage is consists of class C amplifier with LC resonant tank, and the self-quenching circuit.</p><p>The fundamental quench frequency of this reciever is 8 kHz. In the simulation, the supplied voltage, Vdd, is 5.0 volts is used which produced input current of 5.06 mA. The result show that the designed model presents its best performance at he 20 MHz radio frequency (RF).</p>

This master thesis describes a radio reciever with simple architecture which operates at 20 MHz. This is based on low-cost amplifier design. Super-Regenerative Receiver (SRR)is re-examined for its simplicity, low-power and short-range wireless applications. Power consumption is kept to a minimal level without any change in the performance of reciever by providing minimum biasing to discrete devices. This report shows how with the help of modern computer based investigation and simulation tools, a much more wide-ranging characterization of the behavior of the reciever is possible. The Simulation software used to implement this model i advanced Designed System, ADS2006A. This designed model consist of two stages,the linear pre-amplifier stage and the super-regenerative oscillator (non-linear stage). The linear stage has a 1th-order low band-pass filter which connects the input terminal end with the pre-amplifier, while the non-linear stage is consist of class with LC resonant tank, and the self-quenching circuit. The fundamental quench frequency of this reciever is 8 kHz. In the simulation, the supplied voltage, VDD, is 5,0 volts is used which produced input current of 5,06 mA. The results show that the designed model presents its best performance at the 20 MHz radio frequency (RF).

This master thesis describes a radio receiver with architecture which operates at 20 MHz.This is based on low-amplifier design. Super-Regenerative Receiver (SRR) is re-examined for its simplicity, low-power, and short-range wireless applications. Power consumption is kept toa minimal level any change in the performance of receiver by providing minimum biasing to discrete devices. This report shows how with the help of modern computer based investigation and simulation tools, a much more wide-ranging characterization of the behavior of the reciever is possible. The simulation software used to implement this model is advanced Designed System, ADS2006A. This designed medel consists of two stages, the linear pre-amplifier stage and the super-regenerative oscillator (non-linear-stage). The linear stage has a 1st-order low band-pass filter which connects the input terminal end with the pre-amplifier, while the non-linear stage is consists of class C amplifier with LC resonant tank, and the self-quenching circuit. The fundamental quench frequency of this reciever is 8 kHz. In the simulation, the supplied voltage, Vdd, is 5.0 volts is used which produced input current of 5.06 mA. The result show that the designed model presents its best performance at he 20 MHz radio frequency (RF).

International Telemetering Conference Proceedings / October 20-23, 2003 / Riviera Hotel and Convention Center, Las Vegas, Nevada / In this paper, we propose a receiver design for satellite ground station use which can demodulate a waveform without specific knowledge of the data rate, convolutional code rate, or line code used. Several assumptions, consistent with the Space Network operating environment, are made including only certain data rates, convolutional code rates and generator polynomials, and types of line encoders. Despite the assumptions, a wide class of digital signaling (covering most of what might be seen at a ground station receiver) is captured. The approach uses standard signal processing techniques to identify data rate and line encoder class and a look up table with coded sync words (a standard feature of telemetry data frame header) in order to identify the key parameters. As our research has shown, the leading bits of the received coded frame can be used to uniquely identify the parameters. With proper identification, a basic receiver autoconfiguration sequence (date rate, line decoder, convolutional decoder) may be constructed.

A review of adaptive decorrelating detector techniques for direct-sequence code division multiple access (CDMA) signals is given. The goal is to improve CDMA system performance and capacity by reducing interference between users. The techniques considered are implementations of multiuser receivers, for which background material is given. Adaptive algorithms improve the feasibility of such receivers. An adaptive multiuser receiver for CDMA system has been proposed to increase system capacity. The adaptive decorrelator can be used to eliminate interference from known interferers, though it is prone to noise enhancement. However the receiver is basically designed for synchronous CDMA over AWGN channels. In order to confirm the robustness of the receiver for the asynchronous cases, experimental evaluations are displayed when the relative user delays are small compared to the symbol duration and when the channel is Rayleigh multipath fading as in micro-cellular scenarios. In addition to the efficient implementation of the decorrelating detector of [1], the receiver also can be adapted to incorporate decision feedback. Successive interference cancellation techniques reduce interference by cancellation of one detected signal from another. And an efficient incorporation of decorrelator with RAKE and (DF) decision feedback receiver for frequency-selective Rayleigh fading multipath channels is also proposed. Performance evaluation of the detector via computer simulation scenarios is conducted to substantiate it's potential for real-time operation.

Use of multiple antennas at both ends of a communication link, known as multiple-input multiple-output (MIMO), increases the reliability and/or capacity of that link. Orthogonal frequency division multiplexing (OFDM) is an effective technique for high data rate transmission over frequency selective channels. At this time MIMO-OFDM has been proposed for many emerging standards and seems to be a promising solution for future high data rate wireless communications. In the first part of this thesis, a novel sub-optimum detection method for spatially multiplexed multicarrier code division multiplexing (SM-MC-CDM) transmission is proposed. It is shown that compared to the spatially multiplexed OFDM (SM-OFDM), the frequency domain spreading in SM-MC-CDM systems results in an additional diversity gain. To take advantage of diversity and multiplexing while mitigating the interference, a low complexity efficient detector employing unified successive interference cancellation (U-SIC) is designed. Analytical results for the performance and capacity of zero-forcing (ZF) U-SIC are provided. Further performance improvement is achieved by adopting an iterative subcarrier reconstruction-detection algorithm in conjunction with the U-SIC. The results demonstrate significant performance improvement over other existing methods of comparable complexity. Performance of turbo-coded SM-MC-CDM transmission is also investigated. In the next part of the thesis, multiuser MIMO downlink is considered. Efficient transmission schemes based on zero-forcing (ZF) linear receiver processing, eigenmode transmission and partial channel state information are proposed. The proposed schemes utilize a handshaking procedure between the BS and the users to select (schedule) a subset of users and determine the precoding matrix at the base station (BS). The advantage of the proposed limited feedback schemes lies in their relatively low complexity scheduling algorithms and high sum rate throughput, even for a small pool of users. For large user pools and when the number of antennas at each user terminal is at least equal to the number of antennas at the BS, we show that the proposed scheme is asymptotically optimal in the sense that it achieves the same sum rate as the optimum scheme as the number of users approaches infinity. Next, net throughput is used as a benchmark to compare several MIMO-OFDM downlink transmission schemes with complete CSIT and also with limited feedback. Considering limited feedback per chunk user scheduling for MIMO-OFDM downlink, it is shown that there exists a chunk size which maximizes the average net throughput. It is shown that the net throughput maximizing chunk size depends on the number of users in the system and the communication channel's characteristics. Finally, future directions for possible research are given.

Ultra-Wideband (UWB) technology has become one of the hottest topics in wireless communications, for it provides cost-effective, power-efficient, high bandwidth solution for relaying data in the immediate area (up to 10 meters). This work demonstrates two different solutions for the RF front-end designs in the UWB receivers, one is distributed topology, and the other is based on traditional lumped element topology. The distributed amplifier is one of the attractive candidates for UWB Low Noise Amplifier (LNA). The design, analysis and operation of the distributed amplifiers will be presented. A distributed amplifier is designed with Coplanar Waveguide (CPW) transmission lines in 0.25-μm CMOS process for time domain UWB applications. New design techniques and new topologies are developed to enhance the power-efficiency and reduce the chip area. A compact and high performance distributed amplifier with Patterned Grounded Shield (PGS) inductors is developed in 0.25-μm CMOS process. The amplifier has a measurement result of 7.2dB gain, 4.2-6dB noise figure, and less than -10dB return loss through 0-11GHz. A new distributed amplifier implementing cascade common source gain cells is presented in 0.18-μm CMOS. The new amplifier demonstrates a high gain of 16dB at a power consumption of 100mW, and a gain of 10dB at a low power consumption of 19mW. A UWB LNA utilizing resistive shunt feedback technique is reported in 0.18-μm CMOS process. The measurement results of the UWB LNA demonstrate a maximum gain of 10.5dB and a noise figure of 3.3-4.5dB from 3-9.5GHz, while only consuming 9mW power. Based on the distributed amplifier and resistive shunt-feedback amplifier designs, two UWB RF front-ends are developed. One is a distributed LNA-Mixer. Unlike the conventional distributed mixer, which can only deliver low gain and high noise figure, the proposed distributed LNA-Mixer demonstrates 12-14dB gain ,4-5dB noise figure and higher than 10dB return loss at RF and LO ports over 2-16GHz. To overcome the power consumption and chip area problems encountered in distributed circuits, another UWB RF front-end is also designed with lumped elements. This front-end, employing resistive shunt-feedback technique into its LNA design, can achieve a gain of 12dB and noise figure of 8-10dB through 3-10GHz, the return loss of less than -10dB from 3- 10GHz at RF port, and less than -7dB at LO port, while only consuming 25mA current from 1.8V voltage supply.

There are several advantages for optical communication in free space such as simplification,convenience, high bit rate,and sasy design,Free-space optical communication is an alternative for short distance communication. In this work, we desighn and fabricate the optical transmitter and receiver for delivery of audio signal in free-space communication. In circuit design section, audio signals proceed to analog to digital conversion (A/D)and then encode the data. The procedures of encoding block include parallel-series conversion, data cell process adding starter and stop bit, thereby modulate the laser by PCM format in free space. Data cell at receiver terminal will be decoded exactly and synchronized with transmitter terminal for data transmission. After digital to analog conversion, parallel-series data will decode to audio signals. We have accomplished the circuit design of optical transmitter and receiver for transmission of audio signals. Transmission bit rate, optical output power, and transmission distance at transmitter terminal are 200kbit/s,15mW,and >50m, respectively.

No description available.